Enhanced Queued Analog-to-Digital Converter (EQADC)
Freescale Semiconductor
27-79
PXR40 Microcontroller Reference Manual, Rev. 1
rearm the CFIFO to detect new trigger events, upon detection of an asserted EOQ bit in the last transfer.
Refer to
Section 27.7.2.2, Message Format in EQADC
, for details about command formats.
CFIFOs can be configured in single-scan or continuous-scan mode. When a CFIFO is configured in
single-scan mode, the EQADC scans the CQueue one time. The EQADC stops future command transfers
from the triggered CFIFO after detecting the EOQ bit set in the last transfer. After a EOQ bit is detected,
software involvement is required to rearm the CFIFO so that it can detect new trigger events.
When a CFIFO is configured for continuous-scan mode, no software involvement is necessary to rearm
the CFIFO to detect new trigger events after an asserted EOQ is detected. In continuous-scan mode the
whole CQueue is scanned multiple times.
The EQADC also supports different triggering mechanisms for each scan mode. The EQADC will not
transfer commands from a CFIFO until the CFIFO is triggered. The combination of scan modes and
triggering mechanisms allows the support of different requirements for scanning input channels. The scan
mode and trigger mechanism are configured by programming the MODEx field in
EQADC CFIFO Control Registers (EQADC_CFCR)
Enabled CFIFOs can be triggered by software or external trigger events. The elapsed time from detecting
a trigger to transferring a command is a function of clock frequency, trigger synchronization, trigger
filtering or not, programmable trigger events, command transfer, CFIFO prioritization, CBuffer
availability, etc. Fast and predictable transfers can be achieved by ensuring that the CFIFO is not
underflowing and that the target CBuffer is not full when the CFIFO is triggered.
27.7.4.6.1
Disabled Mode
The MODE
x
Section 27.6.2.5, EQADC CFIFO Control Registers (EQADC_CFCR)
, for all of the
CFIFOs can be changed from any other mode to disabled at any time. No trigger event can initiate
command transfers from an CFIFO which has its MODE field programmed to disabled.
NOTE
If MODEx is not disabled, it must not be changed to any other mode besides
disabled. If MODEx is disabled and the CFIFO status is IDLE, MODEx can
be changed to any other mode.
If MODE
x
is changed to disabled:
•
The CFIFO execution status will change to IDLE. The timing of this change depends on whether
a command is being transferred or not:
— When no command transfer is in progress, the EQADC switches the CFIFO to IDLE status
immediately.
— When a command transfer to an on-chip CBuffer is in progress, the EQADC will complete the
transfer, update TC_CF, and switch CFIFO status to IDLE. Command transfers to the internal
CBuffers are considered completed when a command is written to the buffers.
•
The CFIFOs are not invalidated automatically. The CFIFO still can be invalidated by writing a “1
to the CFINVx bit in
Section 27.6.2.5, EQADC CFIFO Control Registers (EQADC_CFCR)
.
Certify that CFS has changed to IDLE before setting CFINVx.
•
The TC_CFx value also is not reset automatically, but it can be reset by writing “0” to it.
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
Page 30: ...PXR40 Microcontroller Reference Manual Rev 1 Freescale Semiconductor xxx...
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Page 66: ...Memory Map PXR40 Microcontroller Reference Manual Rev 1 2 4 Freescale Semiconductor...
Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
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