Enhanced Queued Analog-to-Digital Converter (EQADC)
Freescale Semiconductor
27-99
PXR40 Microcontroller Reference Manual, Rev. 1
there is 1 ADC clock cycle for each bit of resolution. Therefore, for the same ADC clock frequency, the
ADC sample frequency is higher for lower resolutions.
27.7.6.6
ADC Calibration Feature
27.7.6.6.1
Overview
There are three sets of calibration coefficients for each ADC. Each set is composed by a gain factor and
an offset factor: GCCn/OCCn, ALTGCCn1/ALTGCCn1, and ALTGCCn2/ALTGCCn2, where n is the
ADC number 0 or 1. The pair GCCn/OCCn is selected when it is used the normal configuration or the
alternate configurations 3 to 8. The pair ALTGCCn1/ALTGCCn1 is used only when the alternate
configuration 1 is selected. And the pair ALTGCCn2/ALTGCCn2 is for the alternate configuration 2. The
description below is for a generic pair of gain/offset GCC/OCC.
The EQADC provides a calibration scheme to remove the effects of gain and offset errors from the results
generated by the on-chip ADCs. Only results generated by the on-chip ADCs are calibrated. The results
generated by ADCs on the external device are directly sent to RFIFOs unchanged. The main component
of calibration hardware is a Multiply-and-Accumulate (MAC) unit, one per on-chip ADC, that is used to
calculate the following transfer function which relates a calibrated result to a raw, uncalibrated one.
CAL_RES = GCC * R OCC+2;
where:
•
CAL_RES is the calibrated result corresponding the input voltage V
i
.
•
GCC is the gain calibration constant.
•
RAW_RES is the raw, uncalibrated result with resolution adjustment corresponding to an specific
input voltage V
i
.
•
OCC is the offset calibration constant.
•
The addition of two reduces the maximum quantization error of the ADC. See
Quantization Error Reduction During Calibration
Calibration constants GCC and OCC are determined by taking two samples of known reference voltages
and using these samples to calculate the values for the constants. For details and an example about how to
calculate the calibration constants and use them in result calibration refer to
. Once calculated, GCC is stored in the
Section 27.6.3.4, ADC0/1 Gain Calibration Constant
Registers (ADC0_GCCR and ADC1_GCCR)
, and OCC in
Section 27.6.3.5, ADC0/1 Offset Calibration
Constant Registers (ADC0_OCCR and ADC1_OCCR)
, from where their values are fed to the MAC unit.
The alternate gain values are stored in
Section 27.6.3.7, ADC0/1 Alternate Gain Registers
, and the alternate offset values in
Alternate Offset Register (ADC0_AOR1-2 and ADC1_AOR1-2)
. Since the analog characteristics of each
on-chip ADCs differs, each ADC has an independent pair of calibration constants.
A conversion result is calibrated according to the status of CAL bit in the command that initiated the
conversion. If the CAL bit is asserted, the EQADC will automatically calculate the calibrated result before
sending the result to the appropriate RFIFO or companion module. If the CAL bit is negated, the result is
not calibrated, it bypasses the calibration hardware, and is directly sent to the appropriate RFIFO or
companion module.
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
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