Decimation Filter
28-28
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
28.3.5
Timestamp Data Transmission
28.3.5.1
Timestamp Data
When the selected input source is the eQADC, the eQADC can be configured to send timestamp data after
related sample data for filtering. The timestamp is sent back to the RFIFO following the respective filter
output, using the same mechanism. Since the Decimation Filter takes several clock cycles to process a
sample, the timestamp is copied into an internal timestamp register until the filtered output is sent out,
therefore freeing the input buffer for more sample data.
Timestamp information is not supported when the input data source is the CPU or DMA.
28.3.5.2
Timestamp Management
The timestamp data input is automatically sent to the Decimation Filter by the eQADC when configured
to do so in the eQADC conversion command word. However, some additional conditions are considered:
•
The timestamp is additional information that accompanies a sample conversion data. The eQADC
block sends the decimation filter the conversion data with control bits for either prefill or filter
operation. This data may optionally be followed by the corresponding timestamp data. When the
corresponding conversion data is marked for prefill, the timestamp data is not sent to the output
buffer. This occurs because the filter result is not sent to the output buffer.
•
Similarly, when the filter is decimating the results, the timestamp is only sent to the output buffer
if the corresponding received conversion data has generated a filter output that is selected by the
decimation counter to be sent to the output buffer. Other received timestamps that come with data
not selected by the decimator are discarded.
28.3.6
Flush Command
The flush signal is used by the Decimation Filter to execute a partial reset of the filter. This is useful when
the same filter is used on a new set of data samples after finishing the filtering of another set of data.
When the flush control is detected, all filter TAPs are cleared and the DEC_COUNTER[3:0] field in the
status register DECFILT_x_MSR is reset.
The flush function does not clear the Coefficient registers (DECFILT_x_COEFn) in the Decimation Filter,
thus it is not required to re-write these registers after a flush. The output buffer also keeps the last result
and may be retrieved until the next output is posted.
The flush control precedes the input data to be filtered. Therefore, the corresponding sample data is
processed by the block after the flush. When input is from an eQADC (DECFILT_x_MCR[IO_SEL[1] =
0]), the flush command is included in the eQADC conversion command word. See
Configuration for Decimation Filter Operation
for more information on an eQADC configuration of
decimation filter functionality. When input is from the CPU/DMA (DECFILT_x_MCR[IO_SEL[1]] =1),
the flush command comes from the FLUSH bit in the DECFILT_x_IB register. Note that a word of valid
sample data can be available at the same time the flush signal is asserted. In this case the flush is executed
and the sample is processed after the flush.
The flush command is ignored when the Decimation Filter is disabled (DECFILT_x_MCR[MDIS]=1).
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
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