External Bus Interface (EBI)
Freescale Semiconductor
30-49
PXR40 Microcontroller Reference Manual, Rev. 1
pins are required (e.g. D_ADD_DAT[0:15] and D_ADD_DAT[16:31]). Compared to a 16-bit bus
implementation, only 24 pins are required (e.g. D_ADD[8:15] + D_ADD_DAT[16:31]).
When performing a small access read, as described in
Section 30.4.2.6, Small Accesses (Small Port Size
, with A/D multiplexing enabled for this access, the EBI inserts an idle clock cycle
with D_OE negated and CS asserted, to allow for the memory to three-state the bus prior to the EBI driving
the address on the next clock. This clock gap already exists (for other reasons) for non-small-access
transfers, so no additional clock gap is inserted for those cases. See
for an example of a small
access read with A/D multiplexing enabled.
In general, timing diagrams in A/D multiplexing mode are very similar to other diagrams in this document,
except for the behavior of the D_ADD and D_ADD_DAT busses, which can be seen in
Figure 30-37. Small access (32-bit read to 16-bit port) on Address/Data multiplexed bus
30.5
Initialization/Application Information
30.5.1
Booting from External Memory
The EBI block does not support booting directly to external memory (i.e. fetching the first instruction after
reset externally). One common method for an MCU to resemble an external boot with this EBI is to use
an internal Boot Assist Module on the MCU, which fetches the first instruction internally and configures
EBI registers before branching to an external address to “boot” externally.
If code in external memory needs to write EBI registers, this must be done in a way that avoids modifying
EBI registers while external accesses are being performed, such as the following method:
Addr
D_ADD_DAT is valid
Clock Gap
D_ADD_DAT is valid
D_CLKOUT
*
D_ADD[9:30]
D_TS
D_TA
D_RD_WR
D_BDIP
D_OE
CS[n]
**
D_ADD_DAT[16:31]
Addr
Addr+0x2
While the EBI drives all of D_ADD[9:30] to valid address, typically only D_ADD[9:15]
(or less) are used in the system, as D_ADD_DAT[16:31] (or D_ADD_DAT[0:15])
*
would be used for address and data on an external muxed device.
Or D_ADD_DAT[0:15], based on D16_31 bit in EBI_MCR.
**
Addr+0x2
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
Page 30: ...PXR40 Microcontroller Reference Manual Rev 1 Freescale Semiconductor xxx...
Page 40: ...PXR40 Microcontroller Reference Manual Rev 1 xl Freescale Semiconductor...
Page 66: ...Memory Map PXR40 Microcontroller Reference Manual Rev 1 2 4 Freescale Semiconductor...
Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 860: ...FlexCAN Module 24 50 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 1167: ...Decimation Filter Freescale Semiconductor 28 53 PXR40 Microcontroller Reference Manual Rev 1...
Page 1168: ...Decimation Filter 28 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
