FlexRay Communication Controller (FLEXRAY)
Freescale Semiconductor
22-7
PXR40 Microcontroller Reference Manual, Rev. 1
22.2.1.3
FR_A_TX_EN — Transmit Enable Channel A
The FR_A_TX_EN signal indicates to the FlexRay bus driver that the controller is attempting to transmit
data on channel A.
22.2.1.4
FR_B_RX — Receive Data Channel B
The FR_B_RX signal carries the receive data for channel B from the corresponding FlexRay bus driver.
22.2.1.5
FR_B_TX — Transmit Data Channel B
The FR_B_TX signal carries the transmit data for channel B to the corresponding FlexRay bus driver
22.2.1.6
FR_B_TX_EN — Transmit Enable Channel B
The FR_B_TX_EN signal indicates to the FlexRay bus driver that the controller is attempting to transmit
data on channel B.
22.2.1.7
FR_DBG[3], FR_DBG[2], FR_DBG[1], FR_DBG[0] — Strobe Signals
These signals provide the selected debug strobe signals. For details on the debug strobe signal selection
refer to
Section 22.6.16, Strobe Signal Support
22.3
Controller Host Interface Clocking
The clock for the CHI is derived from the system bus clock and has the same phase and frequency as the
system bus clock. Since the FlexRay protocol requires data delivery at fixed points in time, the memory
read cycles from the flexray memory must be finished after a fixed amount of time. To ensure this, a
minimum frequency f
chi
of the CHI clock is required, which is given in
Eqn. 22-1
Additional requirements for the minimum frequency of the CHI clock result from the number of message
buffers. These requirements are provided in
Section 22.7.3, Number of Usable Message Buffers
22.4
Protocol Engine Clocking
The clock for the protocol engine can be generated by two sources. The first source is the internal crystal
oscillator and the second source is an internal PLL. The clock source to be used is selected by the clock
source select bit CLKSEL in the
Module Configuration Register (MCR)
.
22.4.1
Oscillator Clocking
If the protocol engine is clocked by the internal crystal oscillator, an 40 MHz crystal or CMOS compatible
clock must be connected to the oscillator pins. The crystal or clock must fulfill the requirements given by
the
FlexRay Communications System Protocol Specification, Version 2.1 Rev A.
f
chi
32MHz
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
Page 30: ...PXR40 Microcontroller Reference Manual Rev 1 Freescale Semiconductor xxx...
Page 40: ...PXR40 Microcontroller Reference Manual Rev 1 xl Freescale Semiconductor...
Page 66: ...Memory Map PXR40 Microcontroller Reference Manual Rev 1 2 4 Freescale Semiconductor...
Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 860: ...FlexCAN Module 24 50 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 1167: ...Decimation Filter Freescale Semiconductor 28 53 PXR40 Microcontroller Reference Manual Rev 1...
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