FlexRay Communication Controller (FLEXRAY)
Freescale Semiconductor
22-15
PXR40 Microcontroller Reference Manual, Rev. 1
22.5.2.5
System Memory Base Address Register (SYMBADR)
NOTE
The system memory base address must be set before the controller is
enabled.
The system memory base address registers define the base address of the flexray memory within the
system memory. The base address is used by the BMIF to calculate the physical memory address for
system memory accesses.
Table 22-9. FlexRay Channel Selection
SCM
CHB
CHA
Description
Dual Channel Device Modes
0
0
0
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN not driven by controller
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN not driven by controller
0
1
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN driven by controller - connected to FlexRay channel A
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN not driven by controller
1
0
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN not driven by controller
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN driven by controller - connected to FlexRay channel B
1
1
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN driven by controller - connected to FlexRay channel A
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN driven by controller - connected to FlexRay channel B
Single Channel Device Mode
1
0
0
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN not driven by controller
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN not driven by controller
0
1
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN driven by controller - connected to FlexRay channel A
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN not driven by controller
1
0
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN driven by controller - connected to FlexRay channel B
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN not driven by controller
1
1
reserved
Base + 0x0004
Write: Disabled Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
SMBA[31:16]
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 22-4. System Memory Base Address High Register (SYMBADHR)
Base + 0x0006
Write: Disabled Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
SMBA[15:4]
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 22-5. System Memory Base Address Low Register (SYMBADLR)
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
Page 30: ...PXR40 Microcontroller Reference Manual Rev 1 Freescale Semiconductor xxx...
Page 40: ...PXR40 Microcontroller Reference Manual Rev 1 xl Freescale Semiconductor...
Page 66: ...Memory Map PXR40 Microcontroller Reference Manual Rev 1 2 4 Freescale Semiconductor...
Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 860: ...FlexCAN Module 24 50 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 1167: ...Decimation Filter Freescale Semiconductor 28 53 PXR40 Microcontroller Reference Manual Rev 1...
Page 1168: ...Decimation Filter 28 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
