34
Technical Manual
D3081, D3131, D3082 (RX900 S1)
Features
3.2.2.3
Memory interleaving
In Interleaving mode, the physical memory address is decoded at a specific bit
and is sliced into several memory controllers. Interleaving mode is supported by
default.
3.2.3
Memory board configuration table
Table 6
shows the DIMM slot population order and the mapping of DIMM slots
to CPUs and IOHs for 4, 6, and 8 CPUMEMRs.
CPU
No.
DIMM
slot
pop.
order
4 CPUMEMRs
6 CPUMEMRs
8 CPUMEMRs
IOH
No.
1B
1D
1F
1H
1A
1C
1E
1G
2B
2D
2F
2H
2A
2C
2E
2G
1B
1D
1F
1H
1A
1C
1E
1G
2B
2D
2F
2H
2A
2C
2E
2G
1B
1D
1F
1H
1A
1C
1E
1G
2B
2D
2F
2H
2A
2C
2E
2G
CPU#1 1
x
--
--
--
x
--
--
--
x
--
--
--
#1
2
x
x
--
--
x
x
--
--
x
x
--
--
3
x
x
x
--
x
x
x
--
x
x
x
--
4
x
x
x
x
x
x
x
x
x
x
x
x
CPU#2 1
x
--
--
--
x
--
--
--
x
--
--
--
#1
2
x
x
--
--
x
x
--
--
x
x
--
--
3
x
x
x
--
x
x
x
--
x
x
x
--
4
x
x
x
x
x
x
x
x
x
x
x
x
CPU#3 0
--
--
--
--
--
--
--
--
--
--
--
--
#2
1
x
--
--
--
x
--
--
--
x
--
--
--
2
x
x
--
--
x
x
--
--
x
x
--
--
3
x
x
x
--
x
x
x
--
x
x
x
--
4
x
x
x
x
x
x
x
x
x
x
x
x
Table 6: DIMM slot population order and mapping of DIMM slots to I/O Hubs and CPUs