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107
CHAPTER 4 I/O PORTS
■
Port Function Registers (PFR:PFR0 to PFR2, PFR7 and PFRG)
PFR0 to PFR2, PFR7 and PFRG control each bit in the output of the corresponding peripheral.
Be sure to write "0" to unused bits.
PFR0
7
6
5
4
3
2
1
0
Initial value
Access
Address: 00000420
H
PPG8E PPG7E PPG6E PPG5E PPG4E PPG3E PPG2E PPG1E
00000000
B
R/W
PFR1
7
6
5
4
3
2
1
0
Initial value
Access
Address: 00000421
H
–
PPG15E PPG14E PPG13E PPG12E PPG11E PPG10E
PPG9E
-0000000
B
R/W
PFR2
7
6
5
4
3
2
1
0
Initial value
Access
Address: 00000422
H
–
–
SCK1E
SO1E
–
SCK0E
SO0E
–
- - 0 0 - 0 0 -
B
R/W
PFR7
7
6
5
4
3
2
1
0
Initial value
Access
Address: 00000427
H
–
–
–
–
–
–
TO2E TO1E
- - - - - - 0 0
B
R/W
PFRG
7
6
5
4
3
2
1
0
Initial value
Access
Address: 00000430
H
–
–
SCK2E
SO2E
–
–
PPG0E
–
- - 0 0 - - 0 -
B
R/W
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......