205
CHAPTER 11 MULTIFUNCTIONAL TIMER
•
The trigger edge for the external input signal can be selected from the three types: rising edge, falling
edge, and both edges. Also, there are registers that indicate whether the trigger edge is a rising edge or a
falling edge.
•
Four input captures can be used independently.
•
An interrupt can be generated when a valid edge of an external input signal is detected.
●
8/16-bit PPG timer (
×
8)
•
The PPG timer 0 is used to provide the PPG signal for the waveform generator. For more information on
PPG timer 0, see "CHAPTER 9 PPG (Programmable Pulse Generator)".
●
Waveform generator
•
The waveform generator consists of three 16-bit dead timers, three timer control registers, and one 16-
bit waveform control register.
•
The waveform generator can generate real-time output, 16-bit PPG waveform output, non-overlap 3-
phase waveform output (for inverter control), and DC chopper waveform output.
•
The non-overlap waveform output can be generated on the basis of the dead time of the 16-bit dead
timer (dead time timer function).
•
The non-overlap waveform output can be generated when the real-time output is activated in 2 channel
mode (dead time timer function).
•
When a real-time output compare match is detected, GATE signal is generated to started or stopped the
PPG timer operation (GATE function).
•
When a real-time output compare match is detected, the 16-bit dead timer becomes active. With
generating the GATE signal for controlling the PPG operation, the PPG timer 0 can be start or stop
easily (GATE function).
•
DTTI pins can be used to control stopping forcibly.
•
DTTI registers can be used to control stopping forcibly.
●
AD activate compare (
×
3)
•
When the 16-bit free-run timer value matches the compare register, A/D can be activated.
•
Compare 0 can activate the unit 0 of the A/D converter.
•
Compare 1 can activate the unit 1 of the A/D converter.
•
Compare 2 can activate the unit 2 of the A/D converter.
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......