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CHAPTER 11 MULTIFUNCTIONAL TIMER
11.4.9
Input Capture State Control/PPG Output Control Register
(ICSH23, ICSL23, PICSH01, PICSL01)
The input capture state control/PPG output control register (ICSH23, ICSL23, PICSH01,
PICSL01) is used to control the edge selection, the interrupt request enable, the
interrupt request flag, and the PPG output. This register is also used to indicate a valid
edge which was detected on the input capture 2, 3.
■
Input Capture State Control Register (ch.2, ch.3), Upper Byte (ICSH23)
IEI2
Valid edge indication bit (input capture 2)
0
Falling edge is detected.
1
Rising edge is detected.
IEI3
Valid edge indication bit (input capture 3)
0
Falling edge is detected.
1
Rising edge is detected.
-
-
-
-
-
-
-
-
-
-
-
-
IEI3
IEI2
ICSH23
Address: 0000B6
H
Input capture state control register (Upper)
R
R
R : Read only
-: Unused
Initial value: XXXXXX00
B
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
: Initial value
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......