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CHAPTER 11 MULTIFUNCTIONAL TIMER
11.6.4
Waveform Generator Operation
The waveform generator can generate a variety of waveforms (including dead times)
using real-time output (RTO0 to RTO5), the 16-bit PPG timer 0, and 16-bit dead timers 0,
1, and 2.
■
Output Status of RTO0 to RTO5 and GATE
Table 11.6-1 RTO0 to RTO5/GATE Output Status and Bit Settings
TMD2 TMD1 TMD0
GTEN5
to
GTEN0
PGEN5
to
PGEN0
RTO0 to RTO5
GATE
0
0
0
X
X
Real-time output RTx (16-bit output compare output)
Always "0"
0
0
1
X
0
Real-time output RTx (16-bit output compare output)
(RTx &
GTENx)
*3
0
0
1
0
1
RTx outputs a PPG0 pulse for duration "H".
*1
Always "0"
0
0
1
1
1
RTx outputs the PPG0 pulse activated by the GATE signal for
duration "H".
(RT0/RT1/
RT2/RT3/
RT4/RT5)
0
1
0
X
0
The RT0, RT1 rising edge activates the 16-bit dead timer 0, and
the 16-bit dead timer 0 outputs "H" until it underflows.
Output "H"
during the
timer
operation
*4
X
The RT2, RT3 rising edge activates the 16-bit dead timer 1, and
the 16-bit dead timer 1 outputs "H" until it underflows.
X
The RT4, RT5 rising edge activates the 16-bit dead timer 2, and
the 16-bit dead timer 2 outputs "H" until it underflows.
0
1
0
0
1
The RT0, RT1 rising edge activates the 16-bit dead timer 0, and the
16-bit dead timer 0 outputs the PPG 0 pulse until it underflows.
*1
Always "0"
0
The RT2, RT3 rising edge activates the 16-bit dead timer 1, and the
16-bit dead timer 1 outputs the PPG 0 pulse until it underflows.
*1
0
The RT4, RT5 rising edge activates the 16-bit dead timer 2, and the
16-bit dead timer 2 outputs the PPG 0 pulse until it underflows.
*1
0
1
0
1
1
The RT0, RT1 rising edge activates the 16-bit dead timer 0, and
the 16-bit dead timer 0 outputs the PPG 0 pulse started by the
GATE signal until it underflows.
Output "H"
during the
timer
operation
*4
1
The RT2, RT3 rising edge activates the 16-bit dead timer 1, and
the 16-bit dead timer 1 outputs the PPG 0 pulse started by the
GATE signal until it underflows.
1
The RT4, RT5 rising edge activates the 16-bit dead timer 2, and
the 16-bit dead timer 2 outputs the PPG 0 pulse started by the
GATE signal until it underflows.
1
0
0
X
X
A non-overlapping signal is generated by means of RT1.
*2
Always "0"
X
A non-overlapping signal is generated by means of RT3.
*2
X
A non-overlapping signal is generated by means of RT5.
*2
1
1
1
0
X
A non-overlapping signal is generated by means of PPG 0.
Always "0"
1
1
1
1
X
A non-overlapping signal is generated by means of the PPG 0
activated by the GATE signal.
(RT0/RT1/
RT2/RT3/
RT4/RT5)
Others
Always "0"
Always "0"
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......