335
CHAPTER 14 8/10-BIT A/D CONVERTER
bit3
bit2
CT1, CT0:
Compare time
setting bits
These bits are used to select the comparison time at the A/D conversion. After analog input
is loaded (after the sampling time has elapsed), then after the time specified in these bits has
passed, the conversion results are checked, and stored in the A/D control status register
(ADCD).
Notes:
• When CT1 and CT0 = 00
B
, 10
B
, or 11
B
, the compare time must be set to at least 720 ns.
When CT1 and CT0 = 01
B
, the compare time must be set to at least 900 ns. If the time
is not set to these values or greater, it may not be possible to obtain correct analog
conversion value.
• Only rewrite these bits before conversion begins, with the A/D operation stopped.
bit1
bit0
ST1, ST0:
Sampling time
setting bits
These bits are used to select the sampling time at the A/D conversion.
When A/D is activated, analog input is retrieved for the time set in these bits.
Notes:
• If the sampling time is not set to 450 ns or more, it may not be possible to obtain correct
analog conversion values.
• Only rewrite these bits before conversion begins, with the A/D operation stopped.
Table 14.4-2 Functions of Each Bit in A/D Mode Setting Register (ADMD) (2 / 2)
Bit Name
Function
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......