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APPENDIX A I/O Map
Appendix Table A-1 I/O Map (1 / 7)
Address
Register
Block
+0
+1
+2
+3
000000H
PDR0 [R/W] B
XXXXXXXX
PDR1 [R/W] B
XXXXXXXX
PDR2 [R/W] B
XXXXXXXX
PDR3 [R/W] B
XXXXXXXX
Port Data Register
000004H
PDR4 [R/W] B
XXXXXXXX
PDR5 [R/W] B
XXXXXXXX
PDR6 [R/W] B
----XXXX
PDR7 [R/W] B
XXXXXXXX
000008H
__________________
00000CH
PDRC [R/W] B
XXXXXXXX
PDRD [R/W] B
------XX
PDRE [R/W] B
------XX
________
000010H
PDRG [R/W] B
--XXXXXX
________
________
________
000014H
to
00003CH
__________________
Reserved
000040H
EIRR0 [R/W] B,H,W
00000000
ENIR0 [R/W] B,H,W
00000000
ELVR0 [R/W] B,H,W
00000000 00000000
Ext int
(INT0 to INT7)
000044H
DICR [R/W] B,H,W
-------0
HRCL [R/W,R] B,H,W
0--11111
________
________
DLYI/Hold Request
000048H
TMRLR0 [W] H,W
XXXXXXXX XXXXXXXX
TMR0 [R] H,W
XXXXXXXX XXXXXXXX
Reload Timer 0
00004CH
________
TMCSR0 [R/W,R] B,H,W
---00000 00000000
000050H
TMRLR1 [W] H,W
XXXXXXXX XXXXXXXX
TMR1 [R] H,W
XXXXXXXX XXXXXXXX
Reload Timer 1
000054H
________
TMCSR1 [R/W,R] B,H,W
---00000 00000000
000058H
TMRLR2 [W] H,W
XXXXXXXX XXXXXXXX
TMR2 [R] H,W
XXXXXXXX XXXXXXXX
Reload Timer 2
00005CH
________
TMCSR2 [R/W,R] B,H,W
---00000 00000000
000060H
SSR0 [R/W,R] B,H,W
00001000
SIDR0[R] / SODR0[W]
B,H,W
XXXXXXXX
SCR0 [R/W] B,H,W
00000100
SMR0 [R/W,W] B,H,W
00--0-0-
UART0
000064H
UTIM0 [R] H / UTIMR0 [W] H
00000000 00000000
DRCL0
--------
*3
UTIMC0 [R/W] B
0--00001
U-TIMER0
000068H
SSR1 [R/W,R] B,H,W
00001000
SIDR1,SODR1[R/W]
B,H,W
XXXXXXXX
SCR1 [R/W] B,H,W
00000100
SMR1 [R/W] B,H,W
00--0-0-
UART1
00006CH
UTIM1 [R] H / UTIMR1 [W] H
00000000 00000000
DRCL1
--------
*3
UTIMC1 [R/W] B
0--00001
U-TIMER1
000070H
SSR2 [R/W,R] B,H,W
00001000
SIDR2,SODR2 [R/W]
B,H,W
XXXXXXXX
SCR2 [R/W] B,H,W
00000100
SMR2 [R/W] B,H,W
00--0-0-
UART2
000074H
UTIM2 [R] H / UTIMR2 [W] H
00000000 00000000
DRCL2
--------
*3
UTIMC2 [R/W] B
0--00001
U-TIMER2
000078H
ADCH0 [R/W] B,H,W
XX000000
ADMD0 [R/W] B,H,W
00001111
ADCD01 [R] B,H,W
XXXXXXXX
ADCD00 [R] B,H,W
XXXXXXXX
A/D Converter 0 /
Analog Input
Control 0
00007CH
ADCS0[R/W,W] B,H,W
00000X00
________
AICR0 [R/W] B,H,W
00000000
________
000080H
ADCH1 [R/W] B,H,W
XXXX0XX0
ADMD1 [R/W] B,H,W
00001111
ADCD11 [R] B,H,W
XXXXXXXX
ADCD10 [R] B,H,W
XXXXXXXX
A/D Converter 1 /
Analog Input
Control 1
000084H
ADCS1[R/W,W] B,H,W
00000X00
________
AICR1 [R/W] B,H,W
------00
________
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......