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440
APPENDIX A I/O Map
000088H
ADCH2 [R/W] B,H,W
XXXX0XX0
ADMD2 [R/W] B,H,W
00001111
ADCD21 [R] B,H,W
XXXXXXXX
ADCD20 [R] B,H,W
XXXXXXXX
A/D Converter 2 /
Analog Input
Control 2
00008CH
ADCS2[R/W,W] B,H,W
00000X00
________
AICR2 [R/W] B,H,W
------00
________
000090H
OCCPBH0, OCCPBL0[W]/OCCPH0, OCCPL0 [R] H,W
00000000 00000000
OCCPBH1, OCCPBL1[W]/OCCPH1, OCCPL1 [R] H,W
00000000 00000000
16bit OCU
000094H
OCCPBH2, OCCPBL2[W]/OCCPH2, OCCPL2 [R] H,W
00000000 00000000
OCCPBH3, OCCPBL3[W]/OCCPH3, OCCPL3 [R] H,W
00000000 00000000
000098H
OCCPBH4, OCCPBL4[W]/OCCPH4, OCCPL4 [R] H,W
00000000 00000000
OCCPBH5, OCCPBL5[W]/OCCPH5, OCCPL5 [R] H,W
00000000 00000000
00009CH
OCSH1 [R/W] B,H,W
X1100000
OCSL0 [R/W] B,H,W
00001100
OCSH3 [R/W] B,H,W
X1100000
OCSL2 [R/W] B,H,W
00001100
0000A0H
OCSH5 [R/W] B,H,W
X1100000
OCSL4 [R/W] B,H,W
00001100
OCMOD [R/W] B,H,W
XX000000
________
0000A4H
CPCLRBH, CPCLRBL[W]/CPCLRH, CPCLRL[R] H,W
11111111 11111111
TCDTH, TCDTL [R/W] H,W
00000000 00000000
16bit Free run
Timer
0000A8H
TCCSH [R/W] B,H,W
00000000
TCCSL [R/W] B,H,W
01000000
________
ADTRGC [R/W] B,H,W
XXXX0000
0000ACH
IPCPH0, IPCPL0 [R] H,W
XXXXXXXX XXXXXXXX
IPCPH1, IPCPL1 [R] H,W
XXXXXXXX XXXXXXXX
16bit ICU
0000B0H
IPCPH2, IPCPL2 [R] H,W
XXXXXXXX XXXXXXXX
IPCPH3, IPCPL3 [R] H,W
XXXXXXXX XXXXXXXX
0000B4H
PICSH01 [W] B,H,W
000000--
PICSL01 [R/W] B,H,W
00000000
ICSH23 [R] B,H,W
XXXXXX00
ICSL23 [R/W] B,H,W
00000000
0000B8H
EIRR1 [R/W] B,H,W
------00
ENIR1 [R/W] B,H,W
------00
ELVR1 [R/W] B,H,W
-------- ----0000
Ext int
(INT8, INT9)
0000BCH
TMRRH0, TMRRL0 [R/W] H,W
XXXXXXXX XXXXXXXX
TMRRH1, TMRRL1 [R/W] H,W
XXXXXXXX XXXXXXXX
Waveform
Generator
0000C0H
TMRRH2, TMRRL2 [R/W] H,W
XXXXXXXX XXXXXXXX
________
________
0000C4H
DTCR0 [R/W] B,H,W
00000000
DTCR1 [R/W] B,H,W
00000000
DTCR2 [R/W] B,H,W
00000000
________
0000C8H
________
SIGCR1 [R/W] B,H,W
00000000
________
SIGCR2 [R/W] B,H,W
XXXXXXX1
0000CCH
ADCOMP0 [R/W] H,W
00000000 00000000
ADCOMP1 [R/W] H,W
00000000 00000000
A/D COMP
0000D0H
ADCOMP2 [R/W] H,W
00000000 00000000
________
ADCOMPC [R/W] B,H,W
XXXXX000
0000D4H
to
0000DCH
________________
Reserved
0000E0H
PWCSR0 [R/W,R] B,H,W
00000000 00000000
PWCR0 [R] H,W
00000000 00000000
PWC
0000E4H
PWCSR1 [R/W,R] B,H,W
00000000 00000000
PWCR1 [R] H,W
00000000 00000000
0000E8H
________
PDIVR0 [R/W] B,H,W
XXXXX000
________
PDIVR1 [R/W] B,H,W
XXXXX000
0000ECH
to
0000FCH
_________________
Reserved
Appendix Table A-1 I/O Map (2 / 7)
Address
Register
Block
+0
+1
+2
+3
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......