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CHAPTER 3 CPU AND CONTROL UNITS
An operation initialization reset (RST) is output to the internal circuitry.
The device enters the oscillation stabilization wait reset (RST) state as the set oscillation stabilization wait
time has passed.
When a setting initialization reset (INIT) request occurs, the device enters the setting initialization reset
(INIT) state.
●
Operation initialization reset (RST) state
This state is the program initialized state. The device enters the state either on receipt of an operation
initialization reset (RST) request or upon termination of the oscillation stabilization wait reset (RST) state.
The CPU stops program execution and the program counter is initialized. Most of the peripheral circuits
are initialized. All of the internal clocks, oscillator circuit, and the enabled main PLL are working.
An operation initialization reset (RST) is output to the internal circuitry.
When the operation initialization reset (RST) request is eliminated, the device enters the RUN state (normal
operating state) and executes the operation initialization reset sequence. When returning from the setting
initialization reset (INIT) state, the device executes the setting initialization reset sequence instead.
When a setting initialization reset (INIT) request occurs, the device enters the setting initialization reset
(INIT) state.
●
Setting initialization reset (INIT) state
This state is the state in which all settings are initialized. The device enters the state upon receipt of a
setting initialization reset (INIT) request.
The CPU stops program execution and the program counter is initialized. All of the peripheral circuits are
initialized. The oscillator circuit operates while the main PLL stops operation. All of the internal clocks
operate except when the external INIT pin maintains "L" level input.
A setting initialization reset (INIT) and an operation initialization reset (RST) are output to the internal
circuitry.
When the setting initialization reset (INIT) request is eliminated, the device is released from this state and
enters the oscillation stabilization wait reset (RST) state. The device then enters the operation initialization
reset (RST) state and executes the setting initialization reset sequence.
●
Priorities of state transition requests
State transition requests follow their priorities given as shown below regardless of the current state. Note,
however, that some requests are generated only under specific conditions; they are made valid only in such
conditions.
[Highest]
Setting initialization reset (INIT) request
↓
End of oscillation stabilization wait time (Occurs only in the oscillation
stabilization wait reset or oscillation stabilization wait RUN state.)
↓
Operation initialization reset (RST) request
↓
Valid interrupt request (Occurs only in the RUN, sleep, or stop state.)
↓
Stop mode request (register write) (Occurs only in the RUN state.)
[Lowest]
Sleep mode request (register write) (Occurs only in the RUN state.)
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......