142
CHAPTER 7 REALOS-RELATED HARDWARE
7.1
Delayed Interrupt Module
The delayed interrupt module generates an interrupt for switching tasks.
Use this module to allow software to generate and clear an interrupt request for the
CPU.
■
Register List
■
Block Diagram
Figure 7.1-1 Block Diagram
Address
7
6
5
4
3
2
1
0
←
Bit No.
00000044
H
–
–
–
–
–
–
–
DLYI
DICR
[R/W]
R-bus
Interrupt request
DLYI
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......