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CHAPTER 16 DMAC (DMA Controller)
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Block Diagram
Figure 16.1-1 Block Diagram of DMAC 5ch
Bus control b
loc
k
Status transition
circuit
DMA control
Address counter
Control read/
w
rite
CR
BLK register
DTC 2-step register
DTCR
DMASA 2-step register
DMADA 2-step register
TYPE.MOD,WS
DSS[3:0]
ERIR,EDIR
SADM,SASZ[7:0]
DADM,DASZ[7:0]
SADR
Selector
Selector
Read
Write
Buffer
Selector
Selector
Counter
Counter
Bus control b
loc
k
Request DMA transfer
to bus controller
X-b
us
To interrupt controller
IRQ[4:0]
DMA start factor
selection circuit
&
Control the request
receiving
Priority circuit
Input peripheral start request/stop
Write back
Counter Buff
er
Write back
Counter Buff
er
Buffer
To bus
controller
Clear peripheral interrupt
MCLREQ
Wr
ite bac
k
Access
Address
DADR
Summary of Contents for FR60Lite
Page 3: ......
Page 5: ......
Page 115: ...100 CHAPTER 3 CPU AND CONTROL UNITS ...
Page 127: ...112 CHAPTER 4 I O PORTS ...
Page 143: ...128 CHAPTER 5 INTERRUPT CONTROLLER ...
Page 155: ...140 CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ...
Page 197: ...182 CHAPTER 9 PPG Programmable Pulse Generator ...
Page 337: ...322 CHAPTER 13 UART ...
Page 417: ...402 CHAPTER 16 DMAC DMA Controller ...
Page 445: ...430 CHAPTER 17 FLASH MEMORY ...
Page 451: ...436 CHAPTER 18 SERIAL PROGRAMMING CONNECTION ...
Page 493: ...478 APPENDIX F Precautions on Handling ...
Page 494: ...479 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 507: ...492 INDEX ...
Page 509: ......