11
5. 3 Expansion Trace Memory AC Specifications
■
DSU-side Trace Memory Write Timing
Figure 9 shows the trace memory write timing as seen from the DSU side.
Figure 9 DSU-side trace memory write timing
Addre
ss
D
a
t
a
WRITE
TCLK
TEMUL
TRDYX
TAD[27:0]
TWRX
TOEX
TDT[6
3
:0]
TAD
S
CX
(1)
(2)
(
3
)
(4)
(
3
)
(4)
(
3
)
(4)
(5)
(6)
Symbol
Description
Min
Max
Units
(1)
TEMUL setup time
3
-
ns
(2)
TEMUL hold time
3
-
ns
(3)
TADSCX setup time
3
-
ns
(4)
TADSCX hold time
3
-
ns
(5)
Data setup time
3
-
ns
(6)
Data hold time
3
-
ns
