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CHAPTER 6 LOW-POWER CONSUMPTION MODE
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Pin states in external bus 16-bit data bus mode and multiplex 16-bit external bus mode
Table 6.7-2 summarizes pin states in the external bus 16-bit data bus mode and multiplex 16-bit
external bus mode.
Table 6.7-2 Pin states in external bus 16-bit data bus mode and multiplex 16-bit external bus mode
Pin name
In sleep state
When stopped
In hold state
When reset
Internal ROM
access
immediately after
reset
cancellation
Internal ROM
access after
external ROM
access
SPL = 0
SPL = 1
P07 to P00
(AD07 to AD00)
Input disabled/
Output Hi-Z
Input cutoff/
Output Hi-Z
Input cutoff/
Output Hi-Z
*
5
Input disabled/
Output Hi-Z
Input disabled/
Output Hi-Z
Output Hi-Z/
Input enabled
Output Hi-Z/
Input enabled
P17 to P10
(AD15 to AD08)
P27 to P20
(A23 to A16)
Output state
*
1,
*
2
Output state
*
1,
*
2
Input disabled/
Output Hi-Z *
2
Output state *
1
Output state *
1
Maintains the
previous address
P57 (CLK)
Input disabled/
Output enabled
*
2,
*
3
Input disabled/
Output state
*
1,
*
2
Input disabled/
Output enabled
*
2,
*
3
Input disabled/
Output enabled *
3
CLK output
CLK output
P56 (RDY)
Maintains the
previous state *
4
Input cutoff/
Maintains the
previous state
*
4,
*
5
Input disabled *
2
Input disabled/
Output Hi-Z
Output Hi-Z/
Input enabled
Output Hi-Z/
Input enabled
P55 (HAK)
"L" output
P54 (HRQ)
"H" input
P53 (WRH)
"H" output *
2
"H" output *
2
Input disabled/
Output Hi-Z *
2
"H" output
"H" output
"H" output
P52 (WRL)
P51 (RD)
"H" output
"H" output
Input disabled/
Output Hi-Z
P50 (ALE)
"L" output
"L" output
Output enabled *
2
"L" output
"L" output
P37 to P30
Maintains the
previous state
*
4
Input cutoff/
Maintains the
previous state
*
4
Maintains the
previous state *
4
Input disabled/
Output Hi-Z
Output Hi-Z/
Input enabled
Output Hi-Z/
Input enabled
P47 to P40
P67 to P60
P77 to P70
P97 to P91
PA3 to PA0
P90 (CS0)
"H" output
P87 to P80
Input enabled *
6
Input enabled
*
6
Input enabled
*
6
Input disabled
*1: "Output state" means that the pin-drive transistors are set in a drive-enabled state, but internal circuits are
stopped so that a fixed value, "H" or "L", is output. When internal peripheral circuits are in operation and
output functions are used, output varies except when reset. Output does not vary during a reset.
*2: The previous values are retained if used as an output port.
*3: "Output enabled" means that the pin-drive transistors are set in a drive state and that internal circuit
operations are enabled. Operational states are therefore conveyed on the pins.
*4: The state output immediately before this mode was set is output as it is. If it is input, input is disabled.
"Input disabled" means that operations of input gates located very close to the pins are enabled, but pin
states cannot be accepted in internal operations because internal circuits are not operating.
*5: In the state of "Input cutoff", input A is masked and "L" level is transmitted internally. "Output Hi-Z" means
that the pin-drive transistors are disabled and the pins are set to the high-impedance state.
*6: Same as in other ports when used in the output state. "Input enabled" means that input functions are ready
and require pull up/pull down or external input.
Summary of Contents for MB90480 Series
Page 2: ......
Page 4: ......
Page 10: ...vi ...
Page 128: ...106 CHAPTER 4 RESET ...
Page 174: ...152 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 198: ...176 CHAPTER 7 MODE SETTING ...
Page 220: ...198 CHAPTER 9 TIMEBASE TIMER ...
Page 238: ...216 CHAPTER 11 WATCH TIMER ...
Page 280: ...258 CHAPTER 12 16 BIT INPUT OUTPUT TIMER ...
Page 406: ...384 CHAPTER 17 8 10 BIT A D CONVERTER ...
Page 478: ...456 CHAPTER 20 CHIP SELECTION FACILITY ...
Page 494: ...472 CHAPTER 21 ADDRESS MATCH DETECTION FUNCTION ...
Page 498: ...476 CHAPTER 22 ROM MIRROR FUNCTION SELECTION MODULE ...
Page 526: ...504 CHAPTER 23 2M 3M BIT FLASH MEMORY ...
Page 536: ...514 CHAPTER 24 EXAMPLES OF MB90F481B MB90F482B MB90F488B MB90F489B SERIAL PROGRAMMING ...
Page 570: ...548 CHAPTER 25 PWC TIMER ONLY MB90485 SERIES ...
Page 688: ......