250
CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
(Continued)
■
Setting method other than program example
●
Method to set compare value
The compare value is written to the compare registers (OCCP0 to OCCP5).
●
Method to set compare mode (valid for OUT1, OUT2, OUT3, OUT4, OUT5 output)
Set by compare mode bit (OCS01
.
CMOD, OCS23
.
CMOD, OCS45
.
CMOD).
The following is output regardless of the CMOD bit.
•
OUT0 output reverses output by a match with comparison result between free-running timer
and compare register 0.
•
OUT2 output reverses output by a match with comparison result between free-running timer
and compare register 2.
<Interrupt>
•
Interrupt processing
__interrupt void OUTPUT0_int(void)
{
IO_OCS01.bit.ICP0 = 0;
/* bit6 = 0
Clear ICP0 interrupt flag */
•
•
•
•
•
•
}
__interrupt void OUTPUT1_int(void)
{
IO_OCS01.bit.ICP1 = 0;
/* bit7 = 0
Clear ICP1 interrupt flag */
•
•
•
•
•
•
}
<Interrupt vector>
•
Set vector table
#pragma intvect OUTPUT0_int 28
#pragma intvect OUTPUT1_int 29
Note:
Setting related to clock and setting of _set_il (numeric
value) are required in advance. See the chapter of
clock and interrupt.
Note:
For the description form of the register, see "SAMPLE I/O REGISTER FILES FOR F
2
MC-
16LX FAMILY MB90480 SERIES".
Register name. bit name
Clear interrupt request flag
OCS01 .ICP0
(Arbitrary processing)
••••••••••
Clear interrupt request flag
OCS01 .ICP1
(Arbitrary processing)
••••••••••
Operation
Compare mode bit
To reverse OUT1 output by a match with comparison result between
free-running timer and compare register 1
Set (OCS01
.
CMOD) bit to "0"
To reverse OUT3 output by a match with comparison result between
free-running timer and compare register 3
Set (OCS23
.
CMOD) bit to "0"
To reverse OUT5 output by a match with comparison result between
free-running timer and compare register 5
Set (OCS45
.
CMOD) bit to "0"
To reverse Out1 output by match with comparison result between
free-running timer and compare register 0 and between free-running
timer and compare register 1
Set (OCS01
.
CMOD) bit to "1"
To reverse Out3 output by match with comparison result between
free-running timer and compare register 2 and between free-running
timer and compare register 3
Set (OCS23
.
CMOD) bit to "1"
To reverse Out5 output by match with comparison result between
free-running timer and compare register 4 and between free-running
timer and compare register 5
Set (OCS45
.
CMOD) bit to "1"
Summary of Contents for MB90480 Series
Page 2: ......
Page 4: ......
Page 10: ...vi ...
Page 128: ...106 CHAPTER 4 RESET ...
Page 174: ...152 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 198: ...176 CHAPTER 7 MODE SETTING ...
Page 220: ...198 CHAPTER 9 TIMEBASE TIMER ...
Page 238: ...216 CHAPTER 11 WATCH TIMER ...
Page 280: ...258 CHAPTER 12 16 BIT INPUT OUTPUT TIMER ...
Page 406: ...384 CHAPTER 17 8 10 BIT A D CONVERTER ...
Page 478: ...456 CHAPTER 20 CHIP SELECTION FACILITY ...
Page 494: ...472 CHAPTER 21 ADDRESS MATCH DETECTION FUNCTION ...
Page 498: ...476 CHAPTER 22 ROM MIRROR FUNCTION SELECTION MODULE ...
Page 526: ...504 CHAPTER 23 2M 3M BIT FLASH MEMORY ...
Page 536: ...514 CHAPTER 24 EXAMPLES OF MB90F481B MB90F482B MB90F488B MB90F489B SERIAL PROGRAMMING ...
Page 570: ...548 CHAPTER 25 PWC TIMER ONLY MB90485 SERIES ...
Page 688: ......