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625
APPENDIX D Instructions
Note:
See Table D.5-1 and Table D.5-2 for information on (a) to (d) in the table.
Table D.8-16 21 Bit Operand Instructions
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
MOVB
A,dir:bp
3
5
0
(b)
byte (A)
←
(dir:bp)b
Z
*
-
-
-
*
*
-
-
-
MOVB
A,addr16:bp
4
5
0
(b)
byte (A)
←
(addr16:bp)b
Z
*
-
-
-
*
*
-
-
-
MOVB
A,io:bp
3
4
0
(b)
byte (A)
←
(io:bp)b
Z
*
-
-
-
*
*
-
-
-
MOVB
dir:bp,A
3
7
0
2 x (b)
bit (dir:bp)b
←
(A)
-
-
-
-
-
*
*
-
-
*
MOVB
addr16:bp,A
4
7
0
2 x (b)
bit (addr16:bp)b
←
(A)
-
-
-
-
-
*
*
-
-
*
MOVB
io:bp,A
3
6
0
2 x (b)
bit (io:bp)b
←
(A)
-
-
-
-
-
*
*
-
-
*
SETB
dir:bp
3
7
0
2 x (b)
bit (dir:bp)b
←
1
-
-
-
-
-
-
-
-
-
*
SETB
addr16:bp
4
7
0
2 x (b)
bit (addr16:bp)b
←
1
-
-
-
-
-
-
-
-
-
*
SETB
io:bp
3
7
0
2 x (b)
bit (io:bp)b
←
1
-
-
-
-
-
-
-
-
-
*
CLRB
dir:bp
3
7
0
2 x (b)
bit (dir:bp)b
←
0
-
-
-
-
-
-
-
-
-
*
CLRB
addr16:bp
4
7
0
2 x (b)
bit (addr16:bp)b
←
0
-
-
-
-
-
-
-
-
-
*
CLRB
io:bp
3
7
0
2 x (b)
bit (io:bp)b
←
0
-
-
-
-
-
-
-
-
-
*
BBC
dir:bp,rel
4
*1
0
(b)
Branch on (dir:bp) b = 0
-
-
-
-
-
-
*
-
-
-
BBC
addr16:bp,rel
5
*1
0
(b)
Branch on (addr16:bp) b = 0
-
-
-
-
-
-
*
-
-
-
BBC
io:bp,rel
4
*2
0
(b)
Branch on (io:bp) b = 0
-
-
-
-
-
-
*
-
-
-
BBS
dir:bp,rel
4
*1
0
(b)
Branch on (dir:bp) b = 1
-
-
-
-
-
-
*
-
-
-
BBS
addr16:bp,rel
5
*1
0
(b)
Branch on (addr16:bp) b = 1
-
-
-
-
-
-
*
-
-
-
BBS
io:bp,rel
4
*1
0
(b)
Branch on (io:bp) b = 1
-
-
-
-
-
-
*
-
-
-
SBBS
addr16:bp,rel
5
*3
0
2 x (b)
Branch on (addr16:bp) b = 1, bit = 1
-
-
-
-
-
-
*
-
-
*
WBTS
io:bp
3
*4
0
*5
Waits until (io:bp) b = 1
-
-
-
-
-
-
-
-
-
-
WBTC
io:bp
3
*4
0
*5
Waits until (io:bp) b = 0
-
-
-
-
-
-
-
-
-
-
*1: 8 when a branch is made; otherwise, 7
*2: 7 when a branch is made; otherwise, 6
*3: 10 when the condition is met; otherwise, 9
*4: Undefined count
*5: Until the condition is met
Table D.8-17 6 Accumulator Operation Instructions (Byte, Word)
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
SWAP
1
3
0
0
byte (A)0-7
↔
(A)8-15
-
-
-
-
-
-
-
-
-
-
SWAPW
1
2
0
0
word (AH)
↔
(AL)
-
*
-
-
-
-
-
-
-
-
EXT
1
1
0
0
Byte sign extension
X
-
-
-
-
*
*
-
-
-
EXTW
1
2
0
0
Word sign extension
-
X
-
-
-
*
*
-
-
-
ZEXT
1
1
0
0
Byte zero extension
Z
-
-
-
-
R
*
-
-
-
ZEXTW
1
1
0
0
Word zero extension
-
Z
-
-
-
R
*
-
-
-
Summary of Contents for MB90480 Series
Page 2: ......
Page 4: ......
Page 10: ...vi ...
Page 128: ...106 CHAPTER 4 RESET ...
Page 174: ...152 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 198: ...176 CHAPTER 7 MODE SETTING ...
Page 220: ...198 CHAPTER 9 TIMEBASE TIMER ...
Page 238: ...216 CHAPTER 11 WATCH TIMER ...
Page 280: ...258 CHAPTER 12 16 BIT INPUT OUTPUT TIMER ...
Page 406: ...384 CHAPTER 17 8 10 BIT A D CONVERTER ...
Page 478: ...456 CHAPTER 20 CHIP SELECTION FACILITY ...
Page 494: ...472 CHAPTER 21 ADDRESS MATCH DETECTION FUNCTION ...
Page 498: ...476 CHAPTER 22 ROM MIRROR FUNCTION SELECTION MODULE ...
Page 526: ...504 CHAPTER 23 2M 3M BIT FLASH MEMORY ...
Page 536: ...514 CHAPTER 24 EXAMPLES OF MB90F481B MB90F482B MB90F488B MB90F489B SERIAL PROGRAMMING ...
Page 570: ...548 CHAPTER 25 PWC TIMER ONLY MB90485 SERIES ...
Page 688: ......