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CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
12.1 Overview of 16-bit Input/Output Timer
The 16-bit input/output timer consists of one free-running timer, six output compares,
and two input captures. An output of six independent waveforms based on the free-
running timer can be obtained, and measurement of input pulse widths and external
clock intervals is enabled.
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Functions of 16-bit input/output timer
The 16-bit input/output timer consists of a free-running timer, output compare, and input
capture, whose functions are explained below.
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Free-running timer (x 1)
Free-running timer consists of 16-bit up-counter, control register, and prescaler.
The output value of the free-running timer uses as a base time (base timer) of input capture and
output compare.
•
Clock for the count operation can be selected from 8 types of clocks.
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Counter overflow interrupt can be generated.
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The counter initialization is allowed by the match between the value of compare clear
register in output compare and value of free-running timer.
❍
Output compare (x 6)
Output compare consists of six 16-bit compare registers, a compare output latch, and a control
register. If a free-running timer and compare register have matching values, the output level is
reversed with a generation of an interrupt.
•
Six compare registers can operate independently. Each compare register has a
corresponding output pin and interrupt flag.
•
Two compare registers are used as a pair to control the output pin.
•
The initial value of output pin can be set.
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Input capture (x 2)
Input capture consists of two independent external input pins and corresponding capture
registers, control registers, and edge detection circuit. If any edge of a signal input from the
external input pin is detected, the free-running timer value is retained in the capture register
and, at the same time, an interrupt is generated.
•
The edge of an external input signal can be selected from its rising edge, falling edge or both
edges.
•
The two input capture operate independently.
Interrupts occur at the valid edge of external input signals. Input capture can start DMA or
EI
2
OS by the interrupt.
Summary of Contents for MB90480 Series
Page 2: ......
Page 4: ......
Page 10: ...vi ...
Page 128: ...106 CHAPTER 4 RESET ...
Page 174: ...152 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 198: ...176 CHAPTER 7 MODE SETTING ...
Page 220: ...198 CHAPTER 9 TIMEBASE TIMER ...
Page 238: ...216 CHAPTER 11 WATCH TIMER ...
Page 280: ...258 CHAPTER 12 16 BIT INPUT OUTPUT TIMER ...
Page 406: ...384 CHAPTER 17 8 10 BIT A D CONVERTER ...
Page 478: ...456 CHAPTER 20 CHIP SELECTION FACILITY ...
Page 494: ...472 CHAPTER 21 ADDRESS MATCH DETECTION FUNCTION ...
Page 498: ...476 CHAPTER 22 ROM MIRROR FUNCTION SELECTION MODULE ...
Page 526: ...504 CHAPTER 23 2M 3M BIT FLASH MEMORY ...
Page 536: ...514 CHAPTER 24 EXAMPLES OF MB90F481B MB90F482B MB90F488B MB90F489B SERIAL PROGRAMMING ...
Page 570: ...548 CHAPTER 25 PWC TIMER ONLY MB90485 SERIES ...
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