GE Multilin
L90 Line Current Differential System
9-7
9 THEORY OF OPERATION
9.1 OVERVIEW
9
(PFLL) as shown on the diagram above. If GPS time reference is lost, the channel asymmetry compensation is not
enabled, and the relay clock may start to drift and accumulate differential error. In this case, the 87L function has to be
blocked. Refer to Chapter 10: Application of Settings for samples of how to program the relay.
9.1.10 FREQUENCY DETECTION
Estimation of frequency deviation is done locally at each relay based on rotation of positive sequence current, or on rotation
of positive sequence voltage, if it is available. The counter clockwise rotation rate is proportional to the difference between
the desired clock frequency and the actual clock frequency. With the peer to peer architecture, there is redundant frequency
tracking, so it is not necessary that all terminals perform frequency detection.
Normally each relay will detect frequency deviation, but if there is no current flowing nor voltage measurement available at
a particular relay, it will not be able to detect frequency deviation. In that case, the frequency deviation input to the loop filter
is set to zero and frequency tracking is still achieved because of phase locking to the other clocks. If frequency detection is
lost at all terminals because there is no current flowing then the clocks continue to operate at the frequency present at the
time of the loss of frequency detection. Tracking will resume as soon as there is current.
The rotational rate of phasors is equal to the difference between the power system frequency and the ratio of the sampling
frequency divided by the number of samples per cycle. The correction is computed once per power system cycle at each
relay. For conciseness, we use a phasor notation:
(EQ 9.21)
Each terminal computes positive sequence current:
(EQ 9.22)
Each relay computes a quantity derived from the positive sequence current that is indicative of the amount of rotation from
one cycle to the next, by computing the product of the positive sequence current times the complex conjugate of the posi-
tive sequence current from the previous cycle:
(EQ 9.23)
The angle of the deviation phasor for each relay is proportional to the frequency deviation at that terminal. Since the clock
synchronization method maintains frequency synchronism, the frequency deviation is approximately the same for each
relay. The clock deviation frequency is computed from the deviation phasor:
(EQ 9.24)
Note that a four quadrant arctangent can be computed by taking the imaginary and the real part of the deviation separately
for the two arguments of the four quadrant arctangent. Also note that the input to the loop filter is in radian frequency which
is two pi times the frequency in cycles per second; that is,
.
So the radian frequency deviation can be calculated simply as:
(EQ 9.25)
9.1.11 PHASE DETECTION
There are two separate sources of clock phase information; exchange of time stamps over the communications channels
and the current measurements themselves (although voltage measurements can be used to provide frequency information,
they cannot be used for phase detection). Current measurements can generally provide the most accurate information, but
are not always available and may contain large errors during faults or switching transients. Time stamped messages are
I
n
Re Phasor
n
j
Im Phasor
n
+
=
I
a k
n
I
n
=
for phase
a
from the
k
th terminal at time step
n
I
b k
n
I
n
=
for phase
b
from the
k
th terminal at time step
n
I
c k
n
I
n
=
for phase
c
from the
k
th terminal at time step
n
I
pos k
n
1
3
---
I
a k
n
I
b k
n
e
j
2
3
I
c k
n
e
j
2
3
+
+
=
Deviation
k
n
I
pos k
n
I
pos k
n N
–
=
FrequencyDeviation
f
f
-----
tan
1
–
Im Deviation
Re Deviation
2
-------------------------------------------------------------------------------------------------
=
=
2
f
=
f
tan
1
–
Im Deviation
Re Deviation
=
Summary of Contents for UR Series L90
Page 652: ...A 16 L90 Line Current Differential System GE Multilin A 1 PARAMETER LISTS APPENDIX A A ...
Page 772: ...B 120 L90 Line Current Differential System GE Multilin B 4 MEMORY MAPPING APPENDIX B B ...
Page 802: ...C 30 L90 Line Current Differential System GE Multilin C 7 LOGICAL NODES APPENDIX C C ...
Page 812: ...D 10 L90 Line Current Differential System GE Multilin D 1 IEC 60870 5 104 APPENDIX D D ...
Page 824: ...E 12 L90 Line Current Differential System GE Multilin E 2 DNP POINT LISTS APPENDIX E E ...
Page 834: ...F 10 L90 Line Current Differential System GE Multilin F 3 WARRANTY APPENDIX F F ...
Page 846: ...xii L90 Line Current Differential System GE Multilin INDEX ...
