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BIOS Setup
2-3-2-1 CPU P State Control
EIST (P-State)
Conventional Intel SpeedStep Technology switches both voltage and frequency in tandem between high
and low levels in response to processor load.
Options available: Enabled/Disabled. Default setting is
Enabled
.
Turbo Mode
When this item is enabled, tje processor will automatically ramp up the clock speed of 1-2 of its
processing cores to improve its performance.
When this item is disabled, the processor will not overclock any of its core.
Options available: Enabled/Disabled. Default setting is
Enabled
.
P-state coordination
In HW_ALL mode, the processor hardware is responsible for coordinating the P-state among logical
processors dependencies. The OS is responsible for keeping the P-state request up to date on all
logical processors.
In SW_ALL mode, the OS Power Manager is responsible for coordinating the P-state among logical
processors with dependencies and must initiate the transition on all of those Logical Processors.
In SW_ANY mode, the OS Power Manager is responsible for coordinating the P-state among logical
processors with dependencies and may initiate the transition on any of those Logical Processors.
Options available: HW_ALL/SW_ALL/SW_ANY. Default setting is
HW_ALL
.
Summary of Contents for MD60-SC0
Page 9: ... 9 Block Diagram ...
Page 46: ...BIOS Setup 46 2 2 1 Serial Port Console Redirection ...
Page 47: ... 47 BIOS Setup ...
Page 61: ... 61 BIOS Setup 2 9 SIO Configuration ...
Page 62: ...BIOS Setup 62 ...
Page 67: ... 67 BIOS Setup 2 3 1 Processor Configuration ...
Page 70: ...BIOS Setup 70 2 3 1 1 Pre Socket Configuration ...
Page 77: ... 77 BIOS Setup 2 3 4 QPI Configuration ...
Page 81: ... 81 BIOS Setup 2 3 5 1 Memory Topology ...
Page 90: ...BIOS Setup 90 2 3 7 2 PCH sSATA Configuration ...
Page 95: ... 95 BIOS Setup 2 3 7 3 PCH SATA Configuration ...