3.2.2
The RF Path
The path of transmission between the output of the fundamental YIG oscillator and the output of
the instrument includes circuits which perform such functions as RF coupling, leveling,
switching, and filtering. Keeping this RF path as simple and compact as possible with a
minimum of cabling and interconnections is highly desirable because it minimizes power loss
while improving performance and reliability. In the GT 9000, most of the RF path and its
circuits are incorporated into a single module. The circuits which perform path switching,
filtering, coupling, amplification, pulse modulation, and level control for the fundamental
outputs of the YIG oscillators are housed within this module. In instruments which include the
downconverter band (up to 2 GHz), a separate module is installed. This module includes the
mixer and frequency dividers to generate low frequencies, together with the circuits which
amplify, modulate, and control the level of these frequencies.
3.2.3
Phase Lock Loops
The purpose of a phase lock loop is to control the frequency of a variable oscillator to give it
the same accuracy and stability as a fixed reference oscillator. The PLL works by comparing
two frequency inputs, one fixed and one variable, and supplying a correction signal to the
variable oscillator to reduce the difference between the two inputs (see Figure 3-3).
For example, a 10 MHz source with a stability of 1 x 10
-6
/year is to transfer that stability to a
voltage controlled oscillator (VCO). The 10 MHz source is applied to the reference input of a
phase lock loop circuit. The signal from the VCO is applied to the variable input. A phase
detector in the PLL compares the two inputs and determines whether the variable input
waveform is leading or lagging the reference. The phase detector has two outputs; pulses will
appear at one of them (which one depends on whether the variable is leading or lagging), and
the width of the pulses is proportional to the degree of phase difference. The pulses are
averaged by a low pass filter and DC amplifier into a correction signal, which (depending on
polarity) causes the VCO to increase or decrease in frequency to reduce the phase difference.
When the two inputs match, the loop is locked and the variable input from the VCO then equals
the reference input in phase, frequency, accuracy and stability.
The preceding description implies that the two oscillators must be of equal frequency, but that is
not the case in practical applications. Usually, a prescaler (frequency divider) is introduced
between the output of the variable oscillator and the variable input to the PLL. The circuit can
then control a frequency that is an exact multiple of the reference. If a divide-by-two circuit is
Figure 3-3. Phase lock loop circuit
Theory of Operation
Manual No. 120AM00250, Rev C, September 1998
3-3
Summary of Contents for GT 9000
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