3.2.6
The Reference Loop
The operation of the output loop requires a stable reference frequency that is relatively close to
the RF output frequency (the limitations of the divide-by-N circuit demand that the difference
between the two loops be no greater than 395 MHz). Therefore, the reference loop must
accomplish the task of generating a broad range of frequencies and locking them to a single
timebase.
The heart of the reference loop is the step recovery diode multiplier, which is located within the
sampling mixer module. This circuit generates multiple harmonics of the signal that is applied
to it by the 100 MHz VCXO. Even frequencies as high as 8700 MHz (the 87th harmonic) are
generated at useful amplitudes; this permits mixing of the desired harmonic with the microwave
signal produced by the reference oscillator.
Since these harmonics generated by the multiplier are all based on the 100 MHz VCXO, they
have the same stability as the VCXO. Since the 100 MHz VCXO is phase-locked to the master
reference, these harmonics have the same stability as the master reference. The 100 MHz VCXO
is controlled by the 100 MHz PLL circuit, which compares the 10 MHz master reference to the
output of the VCXO (suitably divided by ten) and sends a correction signal to the VCXO to
maintain phase lock. The harmonics generated by the multiplier thus have not only the stability
and accuracy of the master reference, but also the superior phase noise characteristics of the
VCXO. By phase-locking the reference loop to one of the harmonics, it is possible to impart
these desirable characteristics to the reference frequency as well.
Figure 3-6. The reference loop
Model GT 9000 Microwave Synthesizer
3-8
Manual No. 120AM00250, Rev C, September 1998
Summary of Contents for GT 9000
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