2.1
Configuring Console Speed
The address of the UART registers is fixed in the internal circuitry of the R65X1Q and cannot be
changed. The UART bitrate is divided from the main system clock using one of the onboard counters.
ROM images provided by Glitch Works, LLC use SW2 positions 3 and 4 to select the bitrate used for
the ROM monitor or other startup routines. The following table describes the possible configurations
available:
SW2-3
SW2-4
Clock
Console UART Speed
OFF
OFF
1 MHz
4800 bps
OFF
ON
1 MHz
2400 bps
ON
OFF
1 MHz
1200 bps
ON
ON
1 MHz
300 bps
OFF
OFF
2 MHz
9600 bps
OFF
ON
2 MHz
4800 bps
ON
OFF
2 MHz
2400 bps
ON
ON
2 MHz
600 bps
Note that while it is possible to set a division ratio for 9600 bps at 1 MHz (19200 bps at 2 MHz),
this
division ratio will produce a bitrate clock with excessive deviation from standard frequencies
. Many
terminals and other serial-connected devices will have problems with the error introduced at these
bitrates; therefore, the SBC does not provide a user-configurable way to select them.
If a 9600 bps console UART speed is required, it is recommended that a 2 MHz system clock be
used. While Rockwell only specs the A suffix R6501AQ and R6511AQ for 2 MHz operation, internal
testing has shown good results with running non-A parts at 2 MHz. Operation is of course only
guaranteed at Rockwell’s published speeds.
Some serial equipment does not support operation at 4800 bps or operates unreliably at this speed.
If you’re experiencing problems with console output at 4800 bps, try selecting 2400 bps.
2.2
ROM Options
The R65X1Q SBC ROM occupies addresses
0xF000 - 0xFFFF
. ROM is addressed in 4K pages, with
page control via Port C bits 0 through 2. Page control bits are set to
0x03
at reset and power-on.
Port C bit 3 controls ROM enable; when set, ROM is enabled, when cleared, ROM is disabled. This
bit is set at reset and power-on to allow ROM booting.
2.3
Processor Selection
Resistors R1 - R3 and R6 are installed only for R6511Q and R6511AQ processors, and are unnecessary
for R6501Q and R6501AQ processors. These resistors provide pull-ups to I/O lines used on the
SBC.
System clock frequency is determined by crystal Y1 and the internal division ratio of the R65X1Q
processor. Consult the R6500 family datasheet for the processor in use to determine crystal frequency
requirements.
3
Summary of Contents for GW-R65X1QSBC-1
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