Ban k I nt erl eav e
This feature enables you to set the interleave mode of the SDRAM interface.
Interleaving allows banks of SDRAM to alternate their refresh and access
cycles. One bank will undergo its refresh cycle while another is being
accessed. This improves performance of the SDRAM by masking the refresh
time of each bank. A closer examination of interleaving will reveal that since
the refresh cycles of all the SDRAM banks are staggered, this produces a
kind of pipelining effect. If there are 4 banks in the system, the CPU can ideally
send one data request to each of the SDRAM banks in consecutive clock
cycles. This means in the first clock cycle, the CPU will send an address to
Bank 0 and then send the next address to Bank 1 in the second clock cycle
before sending the third and fourth addresses to Banks 2 and 3 in the third
and fourth clock cycles respectively. Each SDRAM DIMM consists of either 2
banks or 4 banks. 2-bank SDRAM DIMMs use 16Mbit SDRAM chips and are
usually 32MB or less in size. 4-bank SDRAM DIMMs, on the other
hand, usually use 64Mbit SDRAM chips though the SDRAM density may be up
to 256Mbit per chip. All SDRAM DIMMs of at least 64MB in size or greater are
4-banked in nature.
If you are using a single 2-bank SDRAM DIMM, set this feature to 2-Bank. But if
you are using two 2-bank SDRAM DIMMs, you can use the 4-Bank option as
well. With 4-bank SDRAM DIMMs, you can use either interleave options.
Naturally, 4-bank interleave is better than 2-bank interleave so if possible, set it
to 4-Bank. Use 2-Bank only if you are using a single 2-bank SDRAM DIMM.
Notethat it is recommends that SDRAM bank interleaving be disabled if 16Mbit
SDRAM DIMMs are used.
Mem ory H ole
Enabling this feature reserves 15MB to 16MB memory address space to ISA
expansion cards that specifically require this setting. This makes the memory
from 15MB and up unavailable to the system. Expansion cards can only
access memory up to 16MB.
P2C/C2P
Con currency
When Disabled, CPU bus will be occupied during the entire PCI operation
period.
System BIOS Cacheable
Allows the system BIOS to be cached for faster system performance.
Video RA M Cachea ble
This item allows you to "Enabled" or "Disabled" on Video RAM Cacheable.
Frame Buff er Size
This item defines the amount of system memory that will be shared and uses
as video memory.
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3312400 User's Manual
