Appendix: QFN and BGA Assembly Guideline
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Appendix: QFN and BGA Assembly Guideline
The QFN and BGA packages are qualified to MSL3 and are RoHS/green compliant. RoHS is the abbreviation of
Restriction of Hazardous Substances Directive
, which puts a limit on the amount of harmful substances in electronic
devices, published by European Union in February 2003. MSL3 represents Moisture Sensitivity Level 3 which indicates
that a moisture sensitive plastic device, once removed from a dry bag, can be exposed to an environment with a
maximum temperature of 30°C and a maximum relative humidity of 60% RH before the solder reflow process.
GR551x storage conditions:
•
Temperature: < 40°C
•
Humidity: < 90% RH
•
Period: 12 months
After opening the package: go through reflow for board assembly within 48 hours.
•
Temperature: < 30°C
•
Humidity: < 60% RH
•
Stored at: < 10% RH
In BGA55 package outlines (as shown in
GR5515GGBD BGA55
), both lead-free solder and Sn/Pb solder applications
use the same rules for the general PCB design. Only the board surface finish and the board material have to be
considered for lead-free application due to the higher reflow temperature and lead-free solder compatibility. A
number of factors may have a significant effect on mounting QFN or BGA packages on the board and the quality of
solder joints. Some of these factors include: amount of solder paste coverage in exposed ground/thermal pad region,
stencil design for peripheral and thermal pad region, type of vias, board thickness, lead finish on the package, surface
finish on the board, type of solder paste, and reflow temperature profile.
Note
:
It should be emphasized that this is just a guideline to help the user in developing the proper motherboard design and
surface mount process. Actual studies as well as development effort may be needed to optimize the process as per
users’ surface mount practices and requirements.
In order to form reliable solder joints, special attention is needed in designing the motherboard pad pattern and
solder paste printing.
Typically, the PCB pad pattern for an existing package is designed based on guidelines developed within a company or
by following industry standards such as IPC-SM-782. For the purpose of this document, methodology of Association
Connecting Electronics Industries (IPC) is used here for designing PCB pad pattern. However, because of exposed die
paddle and the package lands on the bottom side of the package of GR551x, certain constraints are added to IPC’s
methodology. The pad pattern developed here includes considerations for lead and package tolerances.
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