104 ARED4
Display A-port Red Data 4
105 ARED3
Display A-port Red Data 3
106 ARED2
Display A-port Red Data 2
107 Pad 3.3V Ground
PGND
108 Pad 3.3V Power
PVCC
109 33VPNLOUT
Panel on/off switch ot(Max current driving 1A)
110 COUT
Crystal
out
111 ARED1
Display A-port Red Data 1
112 ARED0
Display A-port Red Data 0
113 AGRN1
Display A-port Green Data 1
114 AGRN0
Display A-port Green Data 0
115 SDIO[3]
Serial control I/F data in or Parallel port data [3] (Open
drain) MSB
116 Digital 1.8V Power
VCCK
117 Digital 1.8V Ground
GNDK
118 SCSB
Serial control I/F chip select (Open drain)
119 SCLK
Serial control I/F clock (Open drain)
120 DDCSDA2(DVI)
Open drain (Internal 75K pull high)
121 DDCSCL2(DVI)
Open drain (Internal 75K pull high)
122 PWM0
Pulse width modulation output port0
123 RESET_OUT
Reset
out
124 33VRST_REF
Reference 3.3v for Reset Out
125 DPLL_VDD
Power for digital PLL
126 DPLL_GND
Ground for display digital PLL
127 XO
Crystal OSC output
128 XI
Reference clock input from external crystal or from
single-ended CMOS/TTL OSC
3.S
M5
964(P
L
CC)
Function: MCU
3,1
6<0%2/
'(6&5,37,21
3
%LWRISRUW
37
%LWRISRUW WLPHUFORFNRXW
37(;
%LWRISRUW WLPHUFRQWURO
3
%LWRISRUW
363:0
%LWRISRUW 63:0&KDQQHO
363:0
%LWRISRUW 63:0&KDQQHO
363:0
%LWRISRUW 63:0&KDQQHO
363(0
%LWRISRUW 63:0&KDQQHO
363(0
%LWRISRUW 63:0&KDQQHO
5(6
5HVHW
35;'
%LWRISRUW 5HFHLYHGDWD
13
