CO
NFI
DE
NTI
AL
II - PIN DESCRIPTION
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
2
0
8
2
0
6
2
0
5
2
0
4
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
140
139
138
137
143
142
141
147
146
145
144
149
148
153
152
151
150
156
155
154
2
0
3
2
0
2
2
0
1
2
0
0
1
9
9
1
9
8
1
9
7
1
9
6
1
9
5
1
9
4
1
9
3
1
9
2
1
9
1
1
9
0
1
8
9
1
8
8
1
8
7
1
8
6
1
8
5
1
8
4
1
8
3
1
8
2
1
8
1
1
8
0
1
7
9
1
7
8
1
7
7
1
7
6
1
7
5
1
7
4
1
7
3
1
7
2
1
7
1
1
7
0
1
6
9
1
6
8
1
6
7
1
6
6
1
6
5
1
6
4
1
6
3
1
6
0
1
5
9
1
5
8
1
5
7
1
6
2
1
6
1
2
0
7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
5
3
5
4
5
5
5
6
5
7
5
8
5
9
6
0
6
1
6
2
6
3
6
4
6
5
6
6
6
7
6
8
6
9
7
0
7
1
7
2
7
3
7
4
7
5
7
6
7
7
7
8
7
9
8
0
8
1
8
2
8
3
8
4
8
5
8
6
8
8
8
9
9
0
9
1
9
2
8
7
9
3
9
4
9
5
9
6
9
7
9
8
1
0
0
1
0
1
1
0
2
1
0
3
1
0
4
9
9
V
DD
PIO3[7]
PIO2[0]
GND
PIO2[3]
PIO2[4]
PIO2[5]
PIO2[7]
PIO1[0]
PIO1[2]
PIO1[5]
PIO1[6]
PIO1[7]
PIO4[7]
PIO0[0]
PIO0[3]
PIO0[4]
V
DD
GND
PIO0[5]
PIO0[6]/PCM_OUT2
PIO0[7]
IRQ[0]
PCM_OUT1
IRQ[1]
PWM0/OSLINK_SEL
PWM1/BOOTFROMROM
PWM2
RST
TEST1
TEST2
TEST3
TEST4
V
DD
GND
B_DATA
B_BCLK
B_FLAG
B_SYNC
B_WCLK
TEST5
B_V4
SCLK
PCM_OUT0
PCM_CLK
LRCLK
SPDIF_OUT
V
DDA_PCM
V_REF_PCM
V
SSA_PCM
HSYNC
ODD/EVEN
V
D
D
A
V
S
S
A
B
_
O
U
T
G
_
O
U
T
R
_
O
U
T
I_
R
E
F
_
D
A
C
_
R
G
B
V
_
R
E
F
_
D
A
C
_
R
G
B
V
D
D
A
V
S
S
A
Y
_
O
U
T
C
_
O
U
T
C
V
_
O
U
T
V
_
R
E
F
_
D
A
C
_
Y
C
C
I_
R
E
F
_
D
A
C
_
Y
C
C
V
D
D
G
N
D
A
D
[4
]
A
D
[5
]
A
D
[6
]
A
D
[7
]
A
D
[8
]
A
D
[9
]
V
D
D
M
E
M
C
L
K
O
U
T
G
N
D
A
D
[0
]
A
D
[1
]
A
D
[2
]
A
D
[3
]
A
D
[1
1
]
A
D
[1
0
]
S
D
C
S
[0
]
S
D
C
S
[1
]
V
D
D
G
N
D
S
D
R
A
S
S
D
C
A
S
S
D
W
E
D
Q
M
L
D
Q
[0
]
D
Q
[1
]
D
Q
[2
]
V
D
D
G
N
D
D
Q
[3
]
D
Q
[4
]
D
Q
[5
]
D
Q
[6
]
D
Q
[7
]
V
D
D
G
N
D
M
E
M
C
L
K
IN
DQMU
DQ[8]
DQ[9]
DQ[10]
DQ[11]
V
DD
GND
DQ[12]
DQ[13]
DQ[14]
DQ[15]
AUXCLK
OSD_ACTIVE
PIXCLK_27MHz
V
DD
GND
BE[1]
OE
CE[1]
CE[2]
CE[3]
RAS0/CE[0]
RAS1
CAS0/HOLDACK
V
DD
GND
CAS1/DMAREQ
R/W/DMAACK
DMAXFER
CS
WAIT/READY
PROCCLK
PPC_MODE
V
DD
GND
DATA[0]
DATA[1]
DATA[2]
DATA[3]
DATA[4]
DATA[5]
DATA[6]
DATA[7]
V
DD
GND
DATA[8]
DATA[9]
DATA[10]
DATA[11]
DATA[12]
DATA[13]
V
D
D
P
IO
3
[6
]
P
IO
3
[5
]
P
IO
3
[4
]
P
IO
3
[3
]
P
IO
3
[2
]
P
IO
3
[1
]
P
IO
3
[0
]
G
N
D
P
IO
1
[4
]
P
IO
1
[3
]
P
IO
4
[6
]
P
IO
4
[5
]
P
IO
4
[4
]
P
IO
4
[3
]
P
IO
4
[2
]
P
IO
4
[1
]
P
IO
4
[0
]
T
R
S
T
T
D
O
T
C
K
T
M
S
T
D
I
G
N
D
V
D
D
A
D
R
[2
1
]
A
D
R
[2
0
]
A
D
R
[1
9
]
A
D
R
[1
8
]
A
D
R
[1
7
]
A
D
R
[1
6
]
A
D
R
[1
5
]
A
D
R
[1
4
]
A
D
R
[1
3
]
A
D
R
[1
2
]
A
D
R
[1
1
]
G
N
D
V
D
D
A
D
R
[1
0
]
A
D
R
[9
]
A
D
R
[8
]
A
D
R
[7
]
A
D
R
[6
]
A
D
R
[5
]
A
D
R
[4
]
A
D
R
[3
]
A
D
R
[2
]
A
D
R
[1
]
G
N
D
V
D
D
D
A
T
A
[1
5
]
D
A
T
A
[1
4
]
STi5505
PQFP208
(Top View)
BE[0]
II.1 - Pin Connections
STi5505 (Rev. BB)
14/195
DVD5
harman/kardon
53
Summary of Contents for DVD 5
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