FLI2310 LF Digital Video Converter Data Sheet
C0702-DAT-15B
- 9 -
November 2004
*** Genesis Microchip Confidential ***
PRELIMINARY INFORMATION -- SUBJECT TO CHANGE
3 PIN
INFORMATION
3.1 Pin
Diagram
Figure 3.1: Pinout Information
1 5 5
1 5 0
1 4 5
1 4 0
1 3 5
1 3 0
1 2 5
1 2 0
1 1 5
1 1 0
1 0 5
1
5
1 0
1 5
2 0
2 5
3 0
3 5
4 0
4 5
5 0
5 5
6 5
6 0
1 0 0
9 5
9 0
8 5
8 0
7 5
7 0
2 0 5
1 9 5
2 0 0
1 6 0
1 6 5
1 7 0
1 7 5
1 8 0
1 8 5
1 9 0
HSYNC1_PORT1
VDD1
B/Cb/D1_0
VSS
IN_CLK1_PORT1
FIELD ID1_PORT1
VSYNC1_PORT1
HSYNC2_PORT1
IN_CLK2_PORT1
FIELD ID2_PORT1
VSYNC2_PORT1
B/Cb/D1_6
B/Cb/D1_5
B/Cb/D1_4
B/Cb/D1_3
B/Cb/D1_2
B/Cb/D1_1
B/Cb/D1_7
VDDcore1
VSScore
R/Cr/Cb Cr_0
R/Cr/Cb Cr_6
R/Cr/Cb Cr_5
R/Cr/Cb Cr_4
R/Cr/Cb Cr_3
R/Cr/Cb Cr_2
R/Cr/Cb Cr_1
R/Cr/Cb Cr_7
VDD2
VSS
G/Y/Y_0
G/Y/Y_1
G/Y/Y_6
G/Y/Y_5
G/Y/Y_4
G/Y/Y_3
G/Y/Y_2
G/Y/Y_7
VDDcore2
VSScore
IN_SEL
TEST
DEV_ADDR1
DEV_ADDR0
SCLK
SDATA
RESET_N
VDD3
VSS
SDRAM DATA(0)
SDRAM DATA(2)
SDRAM DATA(1)
SDRAM
DA
TA
(3
)
SDRAM
DA
TA
(1
0)
SDRAM
DA
TA
(9
)
SDRA
M
DATA(8
)
SDRA
M
DATA(7
)
SDRA
M
DATA(6
)
SDRAM
DA
TA
(5
)
SDRAM
DA
TA
(4
)
SDRAM
DA
TA
(1
7)
SDRAM
DA
TA
(1
6)
SDRAM
DA
TA
(1
5)
SDRAM
DA
TA
(1
4)
SDRAM
DA
TA
(1
2)
SDRAM
DA
TA
(1
3)
SDRAM
DA
TA
(1
1)
VDD4
VS
S
VD
D
core3
VS
Sc
or
e
SDRAM
DA
TA
(2
0)
SDRAM
DA
TA
(1
9)
SDRAM
DA
TA
(1
8)
SDRA
M
DATA(3
1)
SDRAM
DA
TA
(3
0)
SDRAM
DA
TA
(2
9)
SDRAM
DA
TA
(2
8)
SDRAM
DA
TA
(2
6)
SDRAM
DA
TA
(2
7)
SDRAM
DA
TA
(2
5)
SDRA
M
DATA(2
4)
SDRAM
DA
TA
(2
3)
SDRAM
DA
TA
(2
1)
SDRAM
DA
TA
(2
2)
VD
D
core4
VS
Sc
or
e
VS
S
VDD5
TES
T IN
SDRA
M
ADDR(1
0)
SDRA
M
ADDR(5
)
SDRA
M
ADDR(4
)
SDRA
M
ADDR(3
)
SDRAM
A
DDR(
6)
SDRA
M
ADDR(7
)
SDRA
M
ADDR(8
)
SDRA
M
ADDR(9
)
VD
D
core5
VS
Sc
or
e
SDRA
M
ADDR(0
)
SDRA
M
ADDR(1
)
SDRA
M
ADDR(2
)
SDRA
M
WE
N
B/U/Pb_OUT_7
VDDcore7
VSScore
R/V/Pr_OUT_7
VDD8
VSS
G/Y/Y_OUT_7
G/Y/Y_OUT_1
G/Y/Y_OUT_2
G/Y/Y_OUT_3
G/Y/Y_OUT_4
G/Y/Y_OUT_5
G/Y/Y_OUT_6
G/Y/Y_OUT_0
R/V/Pr_OUT_0
R/V/Pr_OUT_1
R/V/Pr_OUT_2
R/V/Pr_OUT_3
R/V/Pr_OUT_4
R/V/Pr_OUT_5
R/V/Pr_OUT_6
B/U/Pb_OUT_0
B/U/Pb_OUT_1
B/U/Pb_OUT_2
B/U/Pb_OUT_3
B/U/Pb_OUT_4
B/U/Pb_OUT_5
B/U/Pb_OUT_6
VSS
VDD7
CLKOUT
VSScore
VDDcore6
TEST OUT1
CTLOUT4
CTLOUT0
CTLOUT1
CTLOUT2
CTLOUT3
TEST OUT0
TEST3
SDRAM CLKIN
SDRAM CLKOUT
VSS
VDD6
SDRAM DQM
SDRAM CASN
SDRAM BA1
SDRAM BA0
SDRAM CSN
SDRAM RASN
OE
PLL_PV
D
D
PLL_PV
S
S
AVS
S_P
LL_BE
1
AV
DD_PLL_B
E1
AV
SS
_PLL_S
D
I
AVS
S_P
LL_F
E
AV
SS
_PLL_B
E2
AVD
D
_P
LL_F
E
AVDD_P
LL_SDI
AVD
D
_P
LL_BE
2
R_
VS
S
R_
VDD1
.8
R_
VS
S
Re
se
rv
ed
Re
se
rv
ed
Re
se
rv
ed
R_
VD
D
R_
VDD
R_
VD
D
R_
VS
S
R_
VS
S
R_
VS
S
Re
se
rv
ed
Re
se
rv
ed
Re
se
rv
ed
R_
VS
S
R_
VDD
R_
VS
S
R_
VS
S
R_
VD
D
R_
VDD
TE
ST0
TE
ST1
TE
ST2
XT
AL
IN
XT
AL
O
U
T
VDD9
VSS
HSY
NC_
PORT
2
IN
_C
LK_P
OR
T2
FI
E
LD
ID
_P
O
R
T2
VSY
NC_PORT
2
VS
Sc
or
e
VDDc
ore8
D1
_I
N
_0
D1
_I
N
_7
D1
_I
N
_6
D1
_I
N
_5
D1
_I
N
_4
D1
_I
N
_3
D1
_I
N
_2
D1
_I
N
_1
Package: 208-pin PQFP
harman/kardon
HS 2X0/230 Service Manual
Page 20 of 73
Summary of Contents for HS 2X0/230 Series
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