+3.3V
PHY_RXD1
PHY_RXD0
PHY_CRS_DV
+3.3V
PHY_RST
PHY_TXD1
PHY_TXD0
PHY_TXEN
NC
NC
CONFIG = RMII (Config2,1 = Int. PD,
PHY_REFCLK
pin28=PU)
Speed= 100Mb (pin 31 = Interal PU)
Auto Nego = Off (pin30=PD)
Duplex = Full (pin16=PD)
NETWORK
ETHERNET PHY
TP52
TP53
REF_CLK/B-CAST_OFF
CONFIG1
CONFIG0
TXD1
TXD0
TXEN
PHYAD0
PHYAD1
RXD1/PHYAD2
RXD0/DUPLEX
CRS_DV/CONFIG2
RXER/ISO
MDC
MDIO
INTRP/NAND
VDDA_3V3
VDDIO
RESET
TXP
TXM
RXP
RXM
VDD_1V2
GND
PADDLE
NC1
NC2
NC3
REXT
XO
XI
LED0/NWAYEN
LED1/SPEED
PHY
TXP
RXP
TXN
RXN
+3.3V
OF
PHY_1.2V
LED1
LED2
SHLD
YEL (R)-LINK
GRN (L)-100Mb
J5
J1026F21CNL
14
13
11
12
9
10
8
7
6
5
4
3
2
1
NOTE: PHY strapped for 100Mb, Full Duplex, AutoNeg Off.
uC MAC unable to sense 10Mb operation on RMII.
PHY_RXER
PHY_MDC
PHY_MDIO
+3.3V
31
30
9
8
10
27
26
22
33
1
2
4
5
6
7
32
17
3
21
11
12
20
18
16
15
14
13
23
24
25
28
29
19
U16
KSZ8081
NC
Y3
4
3
2
1
25MHz
+3.3V
C313
18pF
50V
C315
18pF
50V
R136
1K
R250
10K
R161
10K
R135
10K
C126
0.1uF
16V
C127
0.1uF
16V
C78
0.1uF
16V
C320
0.1uF
16V
C321
0.1uF
16V
C125
0.1uF
16V
C128
0.1uF
16V
C129
0.1uF
16V
R223
22
R224
22
R225
22
R226
22
R227
22
R231
22
C149
22uF
10V
C150
22uF
10V
C168
5.6pF
50V
C169
5.6pF
50V
C170
5.6pF
50V
C171
5.6pF
50V
C142
10uF
16V
R115
100
R182
100
6.49K
R55
1
D
C
B
A
2
3
4
SCALE
ASY/SCH PART NO.
REV
SHEET
SIZE
C
NONE
SCH PART NO.
PCB PART NO.
SHEET NAME
REVISE STAMP
E
F
5
D
12
5079218
5079216
1000290874
20/12/2017:11:21
2-PHY
2
4.7K
R97
CPi2000 Service Manual
Version A - 01/19
31
Table of Contents