DVSD / DVSE6800
+
Installation and Operation Manual
17
Chapter 3: Operation
Loss of Signal Switch
When the Loss of Signal (on input 1) switch is enabled, the module
automatically switches the output MUX to select input 2 when input 1
has lost its input signal. When the input 1 signal returns, the output mux
will return input 1 to its previous output state.
Remote Control
When the jumper is set to the “remote” position, the reclocker setting is
handled by
+
Pilot Lite only. You may select the three setting modes
(automatic, manual, and bypass) remotely via
+
Pilot Lite.
P2 / P3 Jumpers
You can use the P2 (for input 1 rate control) or P3 (for input 2 rate
control) jumper on the DVSE6800
+
to select local control reclock
illustrates the location of
these jumpers.
Local Control
In the local control reclock setting operation mode, all of the settings’
data status information appears on the
+
Pilot Lite control screen;
however, you cannot change any setting in this mode via
+
Pilot Lite. To
control the reclocking setting mode via
+
Pilot Lite, set the jumper to the
remote control reclock setting operation mode.
For local control, P2 / P3 is used to determine reclocking mode:
Note
DVSD6800
+
modules do not
use the P2 and P3 jumper sets.
Note
Leitch recommends that you use
the available 6800
+
software
control options (serial / local or
Ethernet / remote) to aid in
viewing, setting, and confirming
parameter values.
Table 3-1.
P2
/
P3 Local Control Reclock Modes
Reclock Mode
Description
AUTO
Automatically detects the rate
143 / 19.4
Forces channel to lock to a 143 Mb / s or a 19.4 Mb / s signal
Set the jumper on the pin that allows the reclocker to handle 143 Mb / s or 19.4 Mb / s data
only
• If the reclocking is successful, the 143 Mb / s – 19.4 Mb / s LED will be green, and the
Reclock status LED indicator next to “HI” (for 143 Mb / s) or next to “LO” (for 19.4
Mb / s) will be green
• If the reclocking is not successful, the 143 Mb / s – 19.4 Mb / s LED will be off, the
Reclock status LED indicator will be off, and un-reclocked data will be present at output
