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Rev. 1.0
12
PCI Express Backplane Diagram
Figure 2-4
shows the PXCe4006 series backplane’s PCIe interface.
Slot 3, 4 and 6 are connected with the system slot using PCIe X4. These slots have up to 2 GB/s (single
direction) dedicated bandwidth (X4 Gen-2 PCI Express).
Slots 2 and 5 are connected with the system slot using PCIe X1. These slots have up to 500MB/s (single
direction) dedicated bandwidth (X1 Gen-2 PCI Express).
PXI Local Bus
The PXIe backplane local bus is a daisy-chained bus, that connects each peripheral slot with adjacent peripheral
slots to the left and right.
The backplane routes PXI Local Bus 6 between all slots. The left Local Bus 6 from Slot 1 is not routed anywhere
and the right local bus signal from slot 6 is not routed anywhere.
Local bus signals may range from high-speed TTL signals to analog signals as high as 42 V.
