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Appendix C I/O Block Diagrams
C.1 Port 1 Block Diagram
Modes 1, 3, and 5
Internal data bus (upper)
Internal address bus
P1
n
DDR
Reset
R
S
Q
D
C
Reset
R
Q
D
P1
n
DR
WP1D
WP1
C
RP1
Modes 1, 3, and 5
Modes 6 and 7
Modes 6 and 7
P1
n
*
Software standby
Hardware standby
WP1D:
WP1:
RP1:
n = 0 to 7
*
:
Write to P1DDR
Write to port 1
Read port 1
Set priority
Figure C-1 Port 1 Block Diagram