621
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit, y: Wait time after clearing SWE bit)
*
2
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations
prohibited)
Notes:
*
1 Except when switching modes, the level of the mode pins (MD
2
to MD
0
) must be fixed until power-off
by pulling the pins up or down.
*
2 See 22.5.6 Flash Memory Characteristics.
φ
V
CC
FWE
t
OSC1
Min 0
µ
s
t
MDS
t
MDS
MD
2
to MD
0
*
1
RES
SWE bit
SWE set
SWE cleared
Program-
ming/
erasing
possible
Wait time:
x
Wait time:
y
Min 0
µ
s
Figure 19.16 Power-On/Off Timing (Boot Mode)
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Page 748: ...700 H8 3064F ZTAT B mask version Ports 1 2 5 LED 600 Ω Figure 22 8 Sample LED Circuit ...
Page 777: ...729 H8 3062F ZTAT B mask version Ports 1 2 5 LED 600 Ω Figure 22 14 Sample LED Circuit ...
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