761
φ
t
TCKS
t
TCKS
t
TCKWH
t
TCKWL
TCLKA to
TCLKD
Figure 22.29 Timer External Clock Input Timing
22.7.6
SCI Input/Output Timing
SCI timing is shown as follows:
•
SCI input clock timing
Figure 22.30 shows the SCI input clock timing.
•
SCI input/output timing (synchronous mode)
Figure 22.31 shows the SCI input/output timing in synchronous mode.
SCK
0
, SCK
1
t
SCKW
t
Scyc
t
SCKr
t
SCKf
Figure 22.30 SCI Input Clock Timing
t
Scyc
t
TXD
t
RXS
t
RXH
SCK
0
,
SCK
1
TxD
0
, TxD
1
(transmit
data)
RxD
0
, RxD
1
(receive
data)
Figure 22.31 SCI Input/Output Timing in Synchronous Mode
Summary of Contents for H8/3060
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