Rev. 3.0, 03/01, page 125 of 390
10.4.10
PCC1 Card Status Change Interrupt Enable Register (PCC1CSCIER)
Bit
7
6
5
4
3
2
1
0
Bit Name
P1CRE
P1IREQE1 P1IREQE0
P1SCE
P1CDE
P1RE
P1BWE
P1BDE
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
The PCC1 card status change interrupt enable register (PCC1CSCIER) is an 8-bit READ and
WRITE register. PCC1CSCIER is capable of setting a valid or invalid interrupt for each interrupt
factor of the PC card connected to PCC1. When register PCC1CSCIER is set to 1, the interrupt is
valid, and invalid when the register is set to 0. PCC1CSCR can be initialized by power-up reset.
PCC1CSCIER is initialized at power-up reset, and holds its value at software reset or in software-
based STANDBY mode.
Bit
Description
Default
7
PCC1 Change Reset Enable (P1CRE)
If this bit is high: The general control register (PCC1GCR) and software control register
(PCC1SCR) in the PCC1 are initialized when a PC card connection change is detected in
PCC1.
If this bit is low: The general control register (PCC1GCR) and software control register
(PCC1SCR) in the PCC1 are not initialized even when a PC card change is detected in
PCC1. (Initial value)
0
6, 5
PCC1 Interrupt Request Enable 1 (P1IREQE1)
PCC1 Interrupt Request Enable 0 (P1IREQE0)
00: Any kind of IREQ interrupt request signal is not accepted for the PC card connected to
PCC1. Bit 5 in the status change register (PCC1CSCR) functions as a READ-only bit, and
indicates the status of the inversion signal of the IREQ pin. (Initial value)
01: The level-mode IREQ interrupt request signal is accepted for the PC card connected
to PCC1. In the level mode, an interrupt occurs when level 0 of the signal input from the
IREQ pin is detected.
10: The pulse-mode IREQ interrupt request signal is accepted for the PC card connected
to PCC1. In the pulse mode, an interrupt occurs when a falling edge from 1 to 0 of the
signal input from the IREQ pin is detected.
11: The pulse-mode IREQ interrupt request signal is accepted for the PC card connected
to PCC1. In the pulse mode, an interrupt occurs when a rising edge from 0 to 1 of the
signal input from the IREQ pin is detected.
0
4
PCC1 STSCHG Change Interrupt Enable (P1SCE)
If this bit is high: An interrupt occurs for the PC card connected to PCC1 when the value of
the PCC1BVD1 pin (STSCHG) is changed from 1 to 0.
If this bit is low: No interrupt occurs for the PC card connected to PCC1 regardless of the
value of the PCC1BVD1 pin. (STSCHG) (Initial value)
0
3
PCC1 Card Detect Change Interrupt Enable (P1CDE)
If this bit is high: An interrupt occurs for the PC card connected to PCC1 when the values
of the PCC1CD1# and PCC1CD2# pins are changed.
If this bit is low: No interrupt occurs for the PC card connected to PCC1 regardless of the
values of the PCC1CD1# and PCC1CD2# pins. (Initial value)
0
Summary of Contents for HD64465
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