Rev. 1.50
50
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Rev. 1.50
51
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HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
Operating Mode Switching
These devices can switch between operating modes dynamically allowing the user to select the best
performance/power ratio for the present task in hand. In this way microcontroller operations that
do not require high performance can be executed using slower clocks thus requiring less operating
current and prolonging battery life in portable applications.
In simple terms, Mode Switching between the NORMAL Mode and SLOW Mode is executed
using the HLCLK bit and CKS2~CKS0 bits in the SMOD register while Mode Switching from the
NORMAL/SLOW Modes to the SLEEP/IDLE Modes is executed via the HALT instruction. When
a HALT instruction is executed, whether the devices enter the IDLE Mode or the SLEEP Mode is
determined by the condition of the IDLEN bit in the SMOD register and the FSYSON bit in the
CTRL register.
When the HLCLK bit switches to a low level, which implies that clock source is switched from the
high speed clock, f
H
, to the clock source, f
H
/2~f
H
/64 or f
SUB
. If the clock is from the f
SUB
, the high
speed clock source will stop running to conserve power. When this happens, it must be noted that
the f
H
/16 and f
H
/64 internal clock sources will also stop running, which may affect the operation of
other internal functions such as the TMs. The accompamying chart shows what happens when the
devices move between the various operating modes.
NORMAL
f
SYS
=f
H
~f
H
/64
f
H
on
CPU r�n
f
SYS
on
f
SUB
on
f
TBC
on
SLOW
f
SYS
=f
SUB
f
SUB
on
CPU r�n
f
SYS
on
f
H
off
f
TBC
on
IDLE0
H�LT instr�ction exec�ted
CPU stop
IDLEN=1
FSYSON=0
f
SYS
off
f
SUB
on
f
TBC
on
IDLE1
H�LT instr�ction exec�ted
CPU stop
IDLEN=1
FSYSON=1
f
SYS
on
f
SUB
on
f
TBC
on
SLEEP1
H�LT instr�ction exec�ted
CPU stop
IDLEN=0
f
SYS
off
f
SUB
on
f
TBC
off
WDT on
SLEEP0
H�LT instr�ction exec�ted
CPU stop
IDLEN=0
f
SYS
off
f
SUB
off
f
TBC
off
WDT & LVD off
