ESMT
M12L64164A
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2008
Revision: 3.3
28/46
FUNCTION TRUTH TABLE (TABLE2)
Current
State
CKE
( n-1 )
CKE
n
CS RAS CAS WE
ADDR ACTION
Note
H
X
X
X
X
X
X
INVALID
L
H
H
X
X
X
X
Exit Self Refresh
Æ
Idle after tRFC (ABI)
6
Self
L
H
L
H
H
H
X
Exit Self Refresh
Æ
Idle after tRFC (ABI)
6
Refresh L H
L
H
H
L X
ILLEGAL
L
H
L
H
L
X
X
ILLEGAL
L
H
L
L
X
X
X
ILLEGAL
L
L
X
X
X
X
X
NOP (Maintain Self Refresh)
H
X
X
X
X
X
X
INVALID
All
L
H
H
X
X
X
X
Exit Self Refresh
Æ
ABI
7
Banks
L
H
L
H
H
H
X
Exit Self Refresh
Æ
ABI
7
Precharge L H L
H H L
X
ILLEGAL
Power L H
L
H
L
X X
ILLEGAL
Down L H
L
L
X
X X
ILLEGAL
L
L
X
X
X
X
X
NOP (Maintain Low Power Mode)
H
H
X
X
X
X
X
Refer to Table1
H
L
H
X
X
X
X
Enter
Power
Down
8
H
L
L
H
H
H
X
Enter
Power
Down
8
H
L
L
H
H
L
X
ILLEGAL
All H
L
L
H
L
X X
ILLEGAL
Banks
H
L
L
L
H
H
RA
Row (& Bank) Active
Idle H
L
L
L
H
H X
NOP
H
L
L
L
L
L
X
Enter Self Refresh
8
H
L
L
L
L
L
OP Code Mode Register Access
L
L
X
X
X
X
X
NOP
Any State
H
H
X
X
X
X
X
Refer to Operations in Table 1
other than
H
L
X
X
X
X
X
Begin Clock Suspend next cycle
9
Listed
L
H
X
X
X
X
X
Exit Clock Suspend next cycle
9
above
L
L
X
X
X
X
X
Maintain Clock Suspend
Abbreviations
:
ABI = All Banks Idle, RA = Row Address
*Note : 6.CKE low to high transition is asynchronous.
7.CKE low to high transition is asynchronous if restart internal clock.
A minimum setup time 1CLK + t
SS
must be satisfy before any command other than exit.
8.Power down and self refresh can be entered only from the all banks idle state.
9.Must be a legal command.
