SystemGuard Test Groups
A-11
SSGA Interrupt Registers Test
This test writes and reads specific values from each of the interrupt registers. The values
are then compared. Values are saved and restored in all the operations.
Floppy Disk Access Test
This test needs a formatted diskette in the diskette drive (the diskette content is erased by
the test). The test writes and reads several sectors on the diskette.
CPU Test Group
These tests are performed by all of the processors at Power-On under the control of Off Line
Test Monitor. These tests check the status of the CPU cards. The following tests are
available under this group.
CPU Processor Tests
This test checks the main instructions of the CPU.
•
Integer Logical Instructions
•
Integer Arithmetic Instructions
•
Floating Point Arithmetic Instructions (Single precision).
ADD. TRANSL. TEST
This test checks all the address translation mechanisms available on the machine. This test
is performed by the CPU.
•
Block Address Translation
•
Segmented Address Translation
Level 1 (primary cache) Test
This test checks the validity of the primary cache, embedded in the processor. This test is
performed automatically at each Power On by the processor internally. The test results are
automatically put in HID0 register. It contains the following sub-test.
HID0.31 Value Test
This test saves the HID0 content, validates the machine check stop
and cache parity check stop bits. Reads the HID0 contents and
restores the saved value.
Level 2 (secondary cache) Test
This test checks the validity of the secondary cache and enables the checking of the
following hardware parts.
1. CCA2 ASICs (partially)
2. CCD2 ASICs (partially)
3. Secondary cache components.
It contains the following three subtests which are destructive, that is values used are not
restored and they are lost:
Level 2 Cache Accessibility Test
This test checks cache accessibility. First, it calculates the available
memory address. It then validates Level 2 cache and writes 2 MB
in memory and in cache. Then it reads the second MB from cache
and first MB from the memory.
Level 2 Cache Data Test
This test checks the validity of the static memory RAMs forming the
Summary of Contents for 7015-R30
Page 1: ...7015 Models R30 R40 and R50 CPU Enclosure Installation and Service Guide...
Page 10: ...x Service Guide...
Page 14: ...xiv Service Guide...
Page 34: ...1 20 Service Guide...
Page 214: ...6 10 Service Guide Detail 5 CPU Module 2 of 3 26 27 29 30 31 32 33 34 28 35...
Page 216: ...6 12 Service Guide Detail 6 CPU Module 3 of 3 36 37...
Page 252: ...B 8 Installation and Service Guide...
Page 288: ...Service Guide D 30...
Page 299: ......
