IBM Power 595 Technical Overview And Introduction Download

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Chapter 2. Architectural and technical overview

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2.14.4 Server firmware

Server firmware is the part of the Licensed Internal Code that enables hardware, such as the
service processor. Check for available server firmware fixes regularly. Depending on your
service environment, you may download your server firmware fixes using different interfaces
and methods. The 595 servers must use the HMC to install server firmware fixes. Firmware is
loaded on to the server and to the bulk power controller over the HMC to the frame’s Ethernet
network.

Server firmware image

The server firmware binary image is a single image that includes code for the service
processor, the POWER Hypervisor™ firmware, and platform partition firmware. This server
firmware binary image is stored in the service processor’s flash memory and executed in the
service processor main memory.

Because each Central Electronics Complex (CEC) has dual service processors (system
controllers), both service processors are updated when firmware updates are applied and
activated using the Licensed Internal Code Updates section of the HMC.

Firmware is available for download at:

http://www14.software.ibm.com/webapp/set2/firmware/gjsn

Power subsystem firmware

Power subsystem firmware is the part of the Licensed Internal Code that enables the power
subsystem hardware in the 595 server. You must use an HMC to update or upgrade power
subsystem firmware fixes.

The bulk power controller (BPC) has its own service processor. The power firmware not only
has the code load for the BPC service processor itself, but it also has the code for the
distributed converter assemblies (DCAs), bulk power regulators (BPRs), fans, and other more
granular field replaceable units (FRUs) that have firmware to help manage the frame and its
power and cooling controls. The BPC service processor code load also has the firmware for
the cluster switches that can be installed in the frame.

In the same way that the CEC has dual service processors, the power subsystem has dual
BPCs. Both are updated when firmware changes are made using the Licensed Internal Code
Updates section of the HMC.

The BPC initialization sequence after the reboot is unique. The BPC service processor must
check the code levels of all the power components it manages, including DCAs, BPRs, fans,
cluster switches, and it must load those if they are different than what is in the active flash side
of the BPC. Code is cascaded to the downstream power components over universal power
interface controller (UPIC) cables.

Platform initial program load

The main function of the 595 system controller is to initiate platform initial program load (IPL),
also referred to as

platform boot

. The service processor has a self-initialization procedure

and then initiates a sequence of initializing and configuring many components on the CEC
backplane.

Note:

Normally, installing the server firmware fixes through an AIX operating system is a

nonconcurrent process.