Chapter 2. Architectural and technical overview
81
2.7.3 Memory configuration and placement
Each processor book features four MCMs. The layout of the MCMs and their corresponding
memory units (a unit is a memory feature, or 4 DIMMs) is shown in Figure 2-33.
Figure 2-33 Processor book with MCM and memory locations
Table 2-18 shows the sequence in which the memory DIMMs are populated within the
processor book. Memory units one through four must be populated on every processor book.
Memory units five through eight are populated in pairs (5 and 6, 7 and 8) and do not have to
be uniformly populated across the installed processor books. For example, on a system with
three processor books, it is acceptable to have memory units 5 and 6 populated on just one of
the processor books.
Table 2-18 Memory DIMM installation sequence
Within a 595 server, individual processor books can contain memory different from that
contained in another processor book. However, within a processor book, all memory must be
comprised using identical memory features.
For balanced memory performance within a 595 server, it is recommended that mixed
memory should not be different by more than 2x in size. That is, a mix of 8 GB and 16 GB
features is acceptable, but a mix of 4 GB and 16 GB is not recommended within a server.
Installation sequence
Memory unit
MCM
1
C33-C36
MCM-S (C28)
2
C21-C24
MCM-T (C26)
3
C13-C16
MCM-V (C27)
4
C5-C8
MCM-U (C25)
5
C29-C32
MCM-S (C28)
6
C17-C20
MCM-T(C26)
7
C9-C12
MCM-V (C27)
8
C1-C4
MCM-U (C25)
MCM-U
MCM-V
MCM-T
MCM-S
C25
C27
C26
C28
Memory unit 8
Memory unit 4
Memory unit 7
Memory unit 3
Memory unit 6
Memory unit 2
C1
C4
Memory unit 1
Memory unit 5
C5
C8
C9
C12
C13
C16
C17
C20
C21
C24
C29
C32
C33
C36
DCA 1
DCA 2
FSP 1
FSP 0
GX-T
GX-S
GX-U
GX-V
MCM-U
MCM-V
MCM-T
MCM-S
C25
C27
C26
C28
Memory unit 8
Memory unit 4
Memory unit 7
Memory unit 3
Memory unit 6
Memory unit 2
C1
C4
Memory unit 1
Memory unit 5
C5
C8
C9
C12
C13
C16
C17
C20
C21
C24
C29
C32
C33
C36
DCA 1
DCA 2
FSP 1
FSP 0
GX-T
GX-S
GX-U
GX-V
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