3 - 6
Pin
No.
Description
IN/
OUT
Condtion
23 Clock to the EEPRROM (HN58X2464TI).
O
24 Serial data from the EEPRROM (HN58X2464TI).
I/O
26 Clock signal to the EEPROM (DIGISEL UNIT; CAT24WC256).
O
27 Serial data from/to the EEPROM (DIGISEL UNIT; CAT24WC256).
I/O
30 RTTY
keying.
I
"H"="space" is marked
31 Transverter control signal from the [ACC] connector.
I
"L"= T r a n s v e r t e r i s
activated.
21 PLL unlock signal.
I
"L"=Unlocked
5–
20
Address bus lines.
O
73–
71
Data bus lines.
I/O
84 WAIT signal (bus line control).
I
"L"=Wait.
85 SEND
signal.
O
"L"=TX
86 Dual Port SRAM intrude signal.
I
87 "L" indicator control signal (bus control).
O
"L"= lights.
88 "H" indicator control signal (bus control).
O
"H"= lights.
89 READ data (bus contol).
O
90 Address data (bus contol).
O
94 PTT/ACC SEND input.
I
"H"=TX
107 Squelch signal to the [ACC] connector.
O
"H"= Squelch open (RX
LED lights)
109 Squelch
signal.
O
"L"= Squelch open (Mute
OFF)
35 External SEND (lead relay) signal output.
O
"H"=Relay ON
36 External SEND (IC relay) signal output.
O
"H"=Relay ON
37 Chip select signal to the Dual Port SRAM.
O
"L"=SRAM is selected.
38 Chip select signal to the expander.
O
"L"= E x p a n d e r i s
selected.
3-4 MAIN CPU (IC604) PORT ALLOCATIONS (continued)
