4 - 3
AF CIRCUITS
Other than WFM mode operation, and when the AF fi lter is
activated, the demodulated AF signals are passed through
the AF fi lter (Q20) and applied to Q18.
In WFM mode operation, and when the AF filter is
inactivated, the demodulated AF signals are passed through
Q23 and applied to Q18.
The amplifi ed AF signals from Q18 are applied to the tone
controller (IC19). The tone controller adjusts the frequency
characteristic of the AF signals. The output signals of tone
controller are then applied to the electric VR IC (IC10) and
level-adjusted.
AF AMP
The level-adjusted AF signals are power-amplified by the
speaker AMP (IC9), then applied to the external/internal
speaker.
CHARGING CONTROL CIRCUIT
IC18 is a charge control IC that contains battery connect
detection, full charge detection, charging current control,
temperature detection, etc. The remaining battery capacity
and type of batter y is detected by the voltage to be
applied to pin 2, and the IC interpret whether pre-charge is
necessary or not.
The charging period is set by resisters connected to the pins
2 and 6, and the temperature is ministered by the voltage to
be applied to pin 8 with external thermostat.
While charging, pin 3 outputs “L” level to the CPU for charging
indication on the LCD. Only when an external power supply
is connected and chargeable batteries are detected through
“BDET” terminal, the IC permits to start charging.
4-4 LOGIC UNIT
The LOGIC UNIT has CPU, D/A converter (DAC), AF circuits
and power supply circuits. The CPU and DAC control the
whole operation of the receiver (RX frequency setting, BPF
tuning etc.), and the AF circuits filter, amplify and tone-
control the demodulated AF signals. The power supply
circuits supply the voltage for each circuits.
CPU
IC17 is a 16 bits CPU that integrated ROM, RAM, the intrude
controller, real time pulse unit, serial interface and A/D
converter on the chip, and the CPU and external EEPROM
(IC14 and IC15) compose the main control system of
receiver.
RESET CIRCUIT
RESET CIRCUIT power-detects of ON/OFF with IC6, and
resets the CPU when the receiver is turned ON/OFF.
CLOCK CIRCUIT
The clock frequency (around 12.288 MHz) of the CPU is
oscillated by X1, C19 and 22. The clock frequency is able to
be shifted to prevent spurious interference.
DAC
IC16 is a 3-ch 8-bit D/A converter. The DAC controls the LO
frequencies, gain of RF AMP, tuning voltage, etc. according
to the serial data from the CPU.
DC UPCONVERTER
The clock signal from the CPU is upconverted to 12 V DC
by the full-wave rectification circuit (IC11, D24 to 27). The
upconverted voltage is passed through the ripple fi lter (Q24,
C158, 195) then applied to the VP terminal of PLL IC as the
charge pump voltage.
POWER SUPPLY CIRCUITS
IC3 is a 3.2 V 3-terminal regulator and supplies voltage to
CPU, EEPROM and RESET IC. While the receiver’s power
is ON, +3 V DC is provided by Q2.
IC4 is also 3.2 V 3-terminal regulator and supplies 3 V (as
R3V) in power save mode.
BAR ANTENNA TUNING CIRCUIT
The internal bar antenna for AM broadcast band RX is tuned
to the frequency to receive by varying the capacitance of
D19 using the voltage from DC-DC upconverter via Q21 and
D37.
DECODE CIRCUIT
The demodulated AF signals “DET” from each detector
circuit are passed through the tone fi lter (1/2 of IC12) and
applied to the CPU for tone signal interpretation.
Another 1/2 of IC12 composes the LPF for VSC function,
and cut the AF line when unwanted continuous audible
signals is out there.
The demodulated AF signals from detector circuit are also
applied to the CPU for other tone signals interpretation (WX/
MSK) via some LPFs.
Summary of Contents for IC-RX7
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