Once the output data sent by the master arrives at the slave it immediately starts
processing the output data. In the next step the encoder input data will be written to the
internal process data image of the slave. The input process data image will be read by
the master in the next cycle.
SyncManager synchronization parameter:
0x1C32.1 = 0x1
0x1C33.1 = 0x22
By setting the operation mode of TwinCAT to "SM-Synchron" the SyncManager
synchronization parameter are set by default to the above values.
Figure 16: SM-Synchron mode selection
5.3.3 Distributed Clocks (DC Mode)
DC clock synchronization enables all EtherCAT devices (master and slaves) to share the
same EtherCAT system time. The EtherCAT slaves in the network can be synchronized to
each other. This enables the master to simultaneously set the output (e.g. digital output,
pulse output) or to synchronously read inputs (e.g. digital input, encoder counter) of
different slaves in the EtherCAT network.
For system synchronization all slaves are synchronized to one reference clock. Normally
the first EtherCAT slave closest to the master with Distributed Clocks capability becomes
the clock base for the master as well as for other DC slaves.
The EtherCAT slave is synchronized with the SYNC0 or SYNC1 event of the distributed
clock system. After the EtherCAT network has been set into DC communication mode by
the master, the ESC (EtherCAT slave chip) of each slave generates fixed time hardware
interrupt which triggers the slave firmware to process the PDO data received from the
master. The master cycle time and the ESC hardware interrupt time interval are fully
synchronized to the first slave in the network that is used as a reference clock with the
SYNC0 signal.
ICP DAS
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ECAT-2092T User Manual
Version 1.0
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Summary of Contents for ECAT-2092T
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Page 50: ...Table 23 Resetting latch register procedure ICP DAS Page ECAT 2092T User Manual Version 1 0 50...
Page 55: ...Step 5 Set the ECAT 2092T back into OP mode ICP DAS Page ECAT 2092T User Manual Version 1 0 55...
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