3.6 Section 3: Control Register
z
I/O address of control register
= wAd 0*4
z
I/O address of status register
= wAd 0*4
z
I/O address of trigger register
= wAd 1*4
The flow path of analog input signal is given as follows:
MUX
AMP1
ADC
Max=+/-10V
Max=+/-5V
Signals
Single-ended
Differential
AMP1
0
1
0
:
:
:
:
.
1
Gain
Rang
4,3,2,1,0
7,6
9,8
Figure 3-2: The flow path of Analog input signal.
3.6.1 The control register
The format of the control register is given as follows:
B15
B14
B13
B12 ~ B10
B9, B8
B7, B6
B5
B4 ~ B0
z
B4~ B0: A/D channel select
z
B7, B6: A/D gain control.
z
B9, B8: A/D input range control.
z
B12~B10: external trigger control.
z
B13: handshake control to MagicScan controller.
z
B15: clear FIFO.
z
B5, B14: reserved
PCI-1202/1602/1800/1802 Hardware User’s Manual
(Ver. 4.2, Dec/2009, PMH-014-42)---- 39