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Appendix A. Watch-Dog Timer
The WatchDog Timer is a device to ensure that standalone systems can
always recover from abnormal conditions that cause the system to crash.
These conditions may result from an external EMI or a software bug.
When the system stops working, hardware on the board will perform
hardware reset (cold boot) to bring the system back to a known state.
Three I/O ports control the operation of WatchDog Timer.
443 (hex)
Write
Set WatchDog Time period
443 (hex)
Read
Enable the refresh the WatchDog Timer.
043/843 (hex) Read
Disable the WatchDog Timer.
Prior to enable the WatchDog Timer, user has to set the time-out period.
The resolution of the timer is 1 second and the range of the timer is from
1 sec to 255 sec. You need to send the time-out value to the I/O port –
443H, and then enable it by reading data from the same I/O port – 443H.
This will activate the timer that will eventually time out and reset the CPU
board. To ensure that this reset condition won’t occur, the WatchDog
Timer must be periodically refreshed by reading the same I/O port 443H.
This must be done within the time-out period that is set by the software,
please refer to the example program. Finally, we have to disable the
WatchDog timer by reading the I/O port -- 843H or 043H. Otherwise the
system could reset unconditionally.
A tolerance of at least 5% must be maintained to avoid unknown routines
in the operating system (DOS), such as disk I/O that can be very time-
consuming. Therefore if the time-out period has been set to 10 seconds,
the I/O port 443H must be read within 7 seconds
.
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Example assembly program:
TIMER_PORT = 443H
TIMER_START = 443H
TIMER_STOP = 843H
;;Initial Timer Counter
MOV DX, TIMER_PORT
MOV AL, 8
;;8 seconds
OUT DX, AL
MOV DX, TIMER_START
IN AL, DX
.
;;Start counter
W_LOOP:
MOV DX, TIMER_STOP
IN AL, DX
MOV DX, TIMER_START
IN AL, DX
;;Restart counter
;;Add Your Appliaction Here
CMP EXIT_AP, 0
JNE W_LOOP
MOV DX, TIMER_STOP
IN AL, DX
;;Exit AP
