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Appendix B: Flash BIOS Programming .................................................................. B-1
Appendix C: Troubleshooting ................................................................................. C-1
Power-On Self Test ........................................................................................................................... C-1
Post Phases ...................................................................................................................................... C-1
BIOS Error Reporting ........................................................................................................................ C-1
CE Declaration of Conformity
List of Figures
Figure 1-1: 586MBH Industrial System Board .......................................................................................... 1-3
Figure 1-2: Jumper Locations ................................................................................................................. 1-4
Figure 1-3: SIMM Installation .................................................................................................................. 1-9
Figure 1-4: Memory Modules Socket Locations ...................................................................................... 1-9
Figure 1-5: CPU Alignment ................................................................................................................... 1-10
Figure 1-6 CPU Socket Alignment ....................................................................................................... 1-10
Figure 1-7: Power and Control Panel Cables ........................................................................................ 1-11
Figure 1-8: Connector Locations ........................................................................................................... 1-11
List of Tables
Table 1-1: Standard I/O Enable ............................................................................................................... 1-5
Table 1-2: Mouse IRQ Enable ................................................................................................................. 1-5
Table 1-3: CMOS Reset .......................................................................................................................... 1-5
Table 1-4: I/O Port IRQ Selection ............................................................................................................ 1-6
Table 1-5: Clock Frequency .................................................................................................................... 1-6
Table 1-6: Clock Speed Selection ........................................................................................................... 1-7
Table 1-7: DMA Configuration for EPP Parallel Port ............................................................................... 1-7
Table 1-8: Display Selection .................................................................................................................... 1-7
Table 1-9: Cache Size Selection ............................................................................................................ 1-7
Table 1-10: Control Panel Connectors ................................................................................................. 1-12
Table B-1: FLASH BIOS Beep ErrorsB-2
Table C-1: Beep Errors ........................................................................................................................... C-2
Current Revision 1A
July 1997
